[Deepin-Kernel-SIG] [linux 6.6-y] [Upstream] [Intel] Intel: Backport GNR/SRF PMU uncore support to kernel v6.6#826
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June 1, 2025 21:24
…rray ANBZ: #8008 commit b560e0c upstream. The current perf doesn't save the complete address of an uncore unit. The complete address of each unit is calculated by the base address + offset. The type of the base address is u64, while the type of offset is unsigned. In the old platforms (without the discovery table method), the base address and offset are hard coded in the driver. Perf can always use the lowest address as the base address. Everything works well. In the new platforms (starting from SPR), the discovery table provides a complete address for all uncore units. To follow the current framework/codes, when parsing the discovery table, the complete address of the first box is stored as a base address. The offset of the following units is calculated by the complete address of the unit minus the base address (the address of the first unit). On GNR, the latter units may have a lower address compared to the first unit. So the offset is a negative value. The upper 32 bits are lost when casting a negative u64 to an unsigned type. Use u64 to replace unsigned for the uncore offsets array to correct the above case. There is no functional change. Intel-SIG: commit b560e0c perf/x86/uncore: Use u64 to replace unsigned for the uncore offsets array Backport GNR/SRF uncore PMU support to kernel v6.6 Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Ammy Yi <ammy.yi@intel.com> Link: https://lore.kernel.org/r/20231117163939.2468007-2-kan.liang@linux.intel.com [ Yunying Sun: amend commit log ] Signed-off-by: Yunying Sun <yunying.sun@intel.com>
ANBZ: #8008 commit 388d761 upstream. The free-running counters for IIO uncore blocks on Granite Rapids are similar to Sapphire Rapids. The key difference is the offset of the registers. The number of the IIO uncore blocks can also be retrieved from the discovery table. Intel-SIG: commit 388d761 perf/x86/intel/uncore: Support IIO free-running counters on GNR Backport GNR/SRF uncore PMU support to kernel v6.6 Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Ammy Yi <ammy.yi@intel.com> Link: https://lore.kernel.org/r/20231117163939.2468007-4-kan.liang@linux.intel.com [ Yunying Sun: amend commit log ] Signed-off-by: Yunying Sun <yunying.sun@intel.com>
Reviewer's GuideBackports Intel uncore PMU support for Granite Rapids and Sierra Forest from kernel v6.8 to v6.6 by updating array types to 64-bit and wiring in IIO free-running counters for new platforms. Sequence Diagram: Initialization Logic in gnr_uncore_cpu_initsequenceDiagram
participant InitFunc as gnr_uncore_cpu_init
participant GetUncores as uncore_get_uncores
participant GlobalUncores as uncore_msr_uncores (global var)
participant FreeRunningGlobal as spr_uncore_iio_free_running (global var)
participant MaxBoxesFunc as uncore_type_max_boxes
InitFunc->>GetUncores: Call(UNCORE_ACCESS_MSR, UNCORE_SPR_MSR_EXTRA_UNCORES, spr_msr_uncores, UNCORE_GNR_NUM_UNCORE_TYPES, gnr_uncores)
GetUncores-->>InitFunc: uncore_data
InitFunc->>GlobalUncores: uncore_msr_uncores = uncore_data
InitFunc->>MaxBoxesFunc: Call(uncore_msr_uncores, UNCORE_SPR_IIO)
MaxBoxesFunc-->>InitFunc: num_boxes
InitFunc->>FreeRunningGlobal: .num_boxes = num_boxes
InitFunc->>FreeRunningGlobal: .freerunning = gnr_iio_freerunning (new static array)
Class Diagram: Updated Kernel Structures for Uncore PMU Data TypesclassDiagram
class intel_uncore_type {
+u64* msr_offsets (changed from unsigned*)
+u64* pci_offsets (changed from unsigned*)
+u64* mmio_offsets (changed from unsigned*)
%% Other members omitted for brevity
}
class intel_uncore_discovery_type {
+u64* box_offset (changed from unsigned int*)
%% Other members omitted for brevity
}
Class Diagram: New and Updated Data Structures for GNR/SRF PMUclassDiagram
class freerunning_counters {
<<New Struct>>
+u64 reg_off
+u8 event
+u8 umask
+u8 num_ctrs
+u8 bit_width
}
class gnr_iio_freerunning {
<<New Static Array>>
+type: freerunning_counters[]
}
gnr_iio_freerunning "1" o-- "0..*" freerunning_counters : elements are
class icx_cha_msr_offsets {
<<Updated Static Array>>
+type: u64[] (changed from unsigned[])
}
class icx_msr_offsets {
<<Updated Static Array>>
+type: u64[] (changed from unsigned[])
}
class spr_upi_pci_offsets {
<<Updated Static Array>>
+type: u64[] (changed from unsigned int[])
}
class nhmex_cbox_msr_offsets {
<<Updated Static Array>>
+type: u64[] (changed from unsigned[])
}
File-Level Changes
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Pull Request Overview
This PR backports upstream commits to add Granite Rapids (GNR) and Sierra Forest (SRF) uncore PMU support on kernel v6.6 by replacing 32-bit offset arrays with 64-bit types and registering new free-running I/O counters.
- Replace all uncore MSR/PCI/MMIO offset arrays from
unsignedtou64 - Add GNR IIO free-running counter definitions and initialize them in
gnr_uncore_cpu_init() - Update discovery tables to handle 64-bit box offsets
Reviewed Changes
Copilot reviewed 5 out of 5 changed files in this pull request and generated no comments.
Show a summary per file
| File | Description |
|---|---|
| arch/x86/events/intel/uncore_snbep.c | Switched ICX/SR offsets to u64 and added GNR IIO counters |
| arch/x86/events/intel/uncore_nhmex.c | Switched NHMEX CBOX offsets to u64 |
| arch/x86/events/intel/uncore_discovery.h | Changed box_offset member to u64 * |
| arch/x86/events/intel/uncore_discovery.c | Updated allocation of box_offset to use u64 size |
| arch/x86/events/intel/uncore.h | Updated union offset pointers to u64 * |
Comments suppressed due to low confidence (3)
arch/x86/events/intel/uncore_discovery.h:128
- [nitpick] Field name
box_offsetsuggests a single offset, but it represents an array; consider renaming it tobox_offsetsfor clarity.
u64 *box_offset; /* Box offset */
arch/x86/events/intel/uncore_nhmex.c:309
- [nitpick] Comment refers to "msr offset" in singular; update to "msr offsets" to reflect that it's an array of offsets.
/* msr offset for each instance of cbox */
arch/x86/events/intel/uncore_snbep.c:6573
- New GNR IIO free-running counters have been added without corresponding tests; consider adding unit or integration tests to validate registration and event reporting.
static struct freerunning_counters gnr_iio_freerunning[] = {
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Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=8008
To support platform specific uncore PMU events for next Intel Xeon platforms Granite Rapids(GNR) and Sierra Forest(SRF), below upstream commits from v6.8-rc1 should be backported to kernel v6.6:
388d761 perf/x86/intel/uncore: Support IIO free-running counters on GNR
b560e0c perf/x86/uncore: Use u64 to replace unsigned for the uncore offsets array
Backported patches are identical with upstream version.
The backported patches have been verified on GNR and SRF that with this PR, uncore PMU devices with meaningful names will be available under /sys/devices/ instead of general names like uncore_type_x_y.
Link: https://gitee.com/anolis/cloud-kernel/pulls/2682
Summary by Sourcery
Backport upstream uncore PMU enhancements for Intel Granite Rapids and Sierra Forest to kernel v6.6, enabling named uncore PMU devices and support for free-running IIO counters
New Features:
Enhancements: