[Deepin-Kernel-SIG] [linux 6.6-y] [Upstream] [Intel] Intel: support In Field Scan(IFS) SAF & Array BIST on GNR & SRF#829
Conversation
ANBZ: #8013 commit a138ac2 upstream. Intel-SIG: commit a138ac2 platform/x86/intel/ifs: Refactor image loading code Backport Intel In Field Scan(IFS) SAF & Array BIST support for GNR & SRF IFS image loading flow is slightly different for newer IFS generations. In preparation for adding support for newer IFS generations, refactor portions of existing image loading code for reuse. Signed-off-by: Jithu Joseph <jithu.joseph@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Tested-by: Pengfei Xu <pengfei.xu@intel.com> Link: https://lore.kernel.org/r/20231005195137.3117166-3-jithu.joseph@intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> [ Aichun Shi: amend commit log ] Signed-off-by: Aichun Shi <aichun.shi@intel.com>
ANBZ: #8013 commit 07f47c0 upstream. Intel-SIG: commit 07f47c0 platform/x86/intel/ifs: Gen2 scan image loading Backport Intel In Field Scan(IFS) SAF & Array BIST support for GNR & SRF Scan image loading flow for newer IFS generations are slightly different from that of current generation. In newer schemes, loading need not be done once for each socket as was done in gen0. Also the width of NUM_CHUNKS bitfield in SCAN_HASHES_STATUS MSR has increased from 8 -> 16 bits. Similarly there are width differences for CHUNK_AUTHENTICATION_STATUS too. Further the parameter to AUTHENTICATE_AND_COPY_CHUNK is passed differently in newer generations. Signed-off-by: Jithu Joseph <jithu.joseph@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Tested-by: Pengfei Xu <pengfei.xu@intel.com> Link: https://lore.kernel.org/r/20231005195137.3117166-4-jithu.joseph@intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> [ Aichun Shi: amend commit log ] Signed-off-by: Aichun Shi <aichun.shi@intel.com>
ANBZ: #8013 commit 60d2e1b upstream. Intel-SIG: commit 60d2e1b platform/x86/intel/ifs: Metadata validation for start_chunk Backport Intel In Field Scan(IFS) SAF & Array BIST support for GNR & SRF Add an additional check to validate IFS image metadata field prior to loading the test image. If start_chunk is not a multiple of chunks_per_stride error out. Signed-off-by: Jithu Joseph <jithu.joseph@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Tested-by: Pengfei Xu <pengfei.xu@intel.com> Link: https://lore.kernel.org/r/20231005195137.3117166-7-jithu.joseph@intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> [ Aichun Shi: amend commit log ] Signed-off-by: Aichun Shi <aichun.shi@intel.com>
ANBZ: #8013 commit e6483a0 upstream. Intel-SIG: commit e6483a0 platform/x86/intel/ifs: Add new CPU support Backport Intel In Field Scan(IFS) SAF & Array BIST support for GNR & SRF Add Granite Rapids(GNR) and Sierra Forest(SRF) cpuids to x86 match table so that IFS driver can be loaded for those. Signed-off-by: Jithu Joseph <jithu.joseph@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Tested-by: Pengfei Xu <pengfei.xu@intel.com> Link: https://lore.kernel.org/r/20231005195137.3117166-8-jithu.joseph@intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> [ Aichun Shi: amend commit log ] Signed-off-by: Aichun Shi <aichun.shi@intel.com>
ANBZ: #8013 commit b9aa9e4 upstream. Intel-SIG: commit b9aa9e4 platform/x86/intel/ifs: Add new error code Backport Intel In Field Scan(IFS) SAF & Array BIST support for GNR & SRF Make driver aware of a newly added error code so that it can provide a more appropriate error message. Signed-off-by: Jithu Joseph <jithu.joseph@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Tested-by: Pengfei Xu <pengfei.xu@intel.com> Link: https://lore.kernel.org/r/20231005195137.3117166-9-jithu.joseph@intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> [ Aichun Shi: amend commit log ] Signed-off-by: Aichun Shi <aichun.shi@intel.com>
ANBZ: #8013 commit 06d65b2 upstream. Intel-SIG: commit 06d65b2 platform/x86/intel/ifs: ARRAY BIST for Sierra Forest Backport Intel In Field Scan(IFS) SAF & Array BIST support for GNR & SRF Array BIST MSR addresses, bit definition and semantics are different for Sierra Forest. Branch into a separate Array BIST flow on Sierra Forest when user invokes Array Test. Signed-off-by: Jithu Joseph <jithu.joseph@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Tested-by: Pengfei Xu <pengfei.xu@intel.com> Link: https://lore.kernel.org/r/20231005195137.3117166-10-jithu.joseph@intel.com [ij: ARRAY_GEN_* -> ARRAY_GEN* for consistency] Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> [ Aichun Shi: amend commit log ] Signed-off-by: Aichun Shi <aichun.shi@intel.com>
Reviewer's GuideThis pull request extends In Field Scan (IFS) support on Granite Rapids (GNR) and Sierra Forest (SRF) platforms by modularizing error reporting, implementing generation-2 scan hash copy/authentication, adding Array BIST support, enforcing metadata alignment checks, and updating CPU match tables with new MSR and data-structure definitions. Sequence Diagram for IFS Gen2 Image Loading and AuthenticationsequenceDiagram
participant C as Caller
participant F as copy_hashes_authenticate_chunks_gen2()
participant D as Device dev
participant MSR as MSRs
participant IFS_D as ifs_data ifsd
C->>F: Call(dev)
F->>IFS_D: Get ifs_data
F->>F: need_copy_scan_hashes(ifsd)?
alt If hashes need copying or generation < IFS_GEN_STRIDE_AWARE
F->>MSR: wrmsrl(MSR_COPY_SCAN_HASHES, ifs_hash_ptr)
F->>MSR: rdmsrl(MSR_SCAN_HASHES_STATUS)
F->>F: Store hashes_status (includes chunk_size, num_chunks, error_code)
alt If hash copy error (hashes_status.valid is false)
F->>D: hashcopy_err_message(dev, hashes_status.error_code)
F-->>C: Return -EIO
end
F->>IFS_D: Update loaded_version, chunk_size
else Else (hashes already copied for Gen2+)
F->>IFS_D: Get num_chunks, chunk_size from ifsd
end
alt If ifsd.generation >= IFS_GEN_STRIDE_AWARE
F->>MSR: wrmsrl(MSR_SAF_CTRL, INVALIDATE_STRIDE)
F->>MSR: rdmsrl(MSR_CHUNKS_AUTHENTICATION_STATUS)
F->>F: Store chunk_status
alt If couldn't invalidate stride (chunk_status.valid_chunks != 0)
F->>D: dev_err("Couldn't invalidate installed stride")
F-->>C: Return -EIO
end
end
F->>F: Find ifs_meta_data (for starting_chunk_nr)
loop For each chunk (i from 0 to num_chunks-1)
F->>F: Prepare chunk_table (starting_chunk_nr + i, linear_addr)
loop Retry AUTH_INTERRUPTED_ERROR (max IFS_AUTH_RETRY_CT)
F->>MSR: wrmsrl(MSR_AUTHENTICATE_AND_COPY_CHUNK, chunk_table)
F->>MSR: rdmsrl(MSR_CHUNKS_AUTHENTICATION_STATUS)
F->>F: Store chunk_status, err_code (chunk_status.error_code)
end
alt If authentication error (err_code is non-zero)
F->>IFS_D: loading_error = true
F->>D: auth_err_message(dev, err_code)
F-->>C: Return -EIO
end
end
F->>F: Check valid_chunks vs total_chunks from final chunk_status
alt If valid_chunks != total_chunks
F->>IFS_D: loading_error = true
F->>D: dev_err("Couldn't authenticate all chunks")
F-->>C: Return -EIO
end
F->>IFS_D: Update ifsd.valid_chunks
F-->>C: Return 0 (Success)
Sequence Diagram for IFS Array BIST Gen1 Test ExecutionsequenceDiagram
participant C as Caller (do_core_test)
participant F_MAIN as ifs_array_test_gen1()
participant SCL as stop_core_cpuslocked()
participant F_CORE as do_array_test_gen1() (on target CPU)
participant MSR as MSRs
participant IFS_D as ifs_data ifsd
C->>F_MAIN: Call(cpu, dev)
F_MAIN->>IFS_D: Get ifs_data
F_MAIN->>SCL: Call stop_core_cpuslocked(cpu, do_array_test_gen1, &status_var)
activate SCL
SCL->>F_CORE: Execute on target CPU with &status_var
activate F_CORE
F_CORE->>F_CORE: cpu = smp_processor_id()
F_CORE->>F_CORE: first_smt_thread = cpumask_first(cpu_smt_mask(cpu))
alt If cpu == first_smt_thread
F_CORE->>MSR: wrmsrl(MSR_ARRAY_TRIGGER, ARRAY_GEN1_TEST_ALL_ARRAYS)
F_CORE->>MSR: rdmsrl(MSR_ARRAY_STATUS)
F_CORE->>F_CORE: Update status_var with MSR value
end
F_CORE-->>SCL: Return 0
deactivate F_CORE
SCL-->>F_MAIN: Return (status_var contains result)
deactivate SCL
F_MAIN->>IFS_D: Update scan_details with status_var
alt If status_var & ARRAY_GEN1_STATUS_FAIL
F_MAIN->>IFS_D: status = SCAN_TEST_FAIL
else Else
F_MAIN->>IFS_D: status = SCAN_TEST_PASS
end
F_MAIN-->>C: Return
File-Level Changes
Tips and commandsInteracting with Sourcery
Customizing Your ExperienceAccess your dashboard to:
Getting Help
|
|
[APPROVALNOTIFIER] This PR is NOT APPROVED This pull-request has been approved by: The full list of commands accepted by this bot can be found here. DetailsNeeds approval from an approver in each of these files:Approvers can indicate their approval by writing |
There was a problem hiding this comment.
Pull Request Overview
This PR backports upstream support for Intel In Field Scan (IFS) SAF & Array BIST on GNR & SRF platforms.
- Adds new error codes and handling for array tests in runtest.c.
- Refactors scan hash authentication and error messaging in load.c, and expands hardware definitions in ifs.h.
- Updates the CPU matching macro and initialization in core.c to account for test generation (array_gen).
Reviewed Changes
Copilot reviewed 4 out of 4 changed files in this pull request and generated 1 comment.
| File | Description |
|---|---|
| drivers/platform/x86/intel/ifs/runtest.c | Introduces new error codes and extends the scan test branching for ARRAY_GEN1. |
| drivers/platform/x86/intel/ifs/load.c | Refactors error logging for hash copy and authentication, and adds gen2 scan chunk authentication logic. |
| drivers/platform/x86/intel/ifs/ifs.h | Adds new MSR definitions, union structures for gen2 data, and new ifs_data fields. |
| drivers/platform/x86/intel/ifs/core.c | Adjusts the CPU matching macro to include an array_gen parameter and assigns it during device initialization. |
Comments suppressed due to low confidence (1)
drivers/platform/x86/intel/ifs/core.c:13
- [nitpick] Consider adding a brief comment to the updated X86_MATCH macro to explain the purpose and expected values of the new array_gen parameter for future maintainability.
#define X86_MATCH(model, array_gen) ...
| ifsd->loaded_version = ifs_header_ptr->rev; | ||
|
|
||
| if (ifsd->generation > 0) | ||
| return copy_hashes_authenticate_chunks_gen2(dev); |
There was a problem hiding this comment.
[nitpick] The assignment of ifsd->loaded_version occurs in two separate code paths (one in copy_hashes_authenticate_chunks_gen2 and again after cpus_read_unlock). Consider consolidating this update to ensure consistent firmware version tracking across all branches.
| return copy_hashes_authenticate_chunks_gen2(dev); | |
| ret = copy_hashes_authenticate_chunks_gen2(dev); | |
| goto update_version; |
There was a problem hiding this comment.
Hey @Avenger-285714 - I've reviewed your changes and they look great!
Here's what I looked at during the review
- 🟡 General issues: 1 issue found
- 🟢 Security: all looks good
- 🟢 Testing: all looks good
- 🟢 Complexity: all looks good
- 🟢 Documentation: all looks good
Help me be more useful! Please click 👍 or 👎 on each comment and I'll use the feedback to improve your reviews.
| ifsd->loaded_version != ifs_header_ptr->rev; | ||
| } | ||
|
|
||
| static int copy_hashes_authenticate_chunks_gen2(struct device *dev) |
There was a problem hiding this comment.
issue (bug_risk): Possible uninitialized use of chunk_status in copy_hashes_authenticate_chunks_gen2.
If num_chunks is zero, chunk_status may remain uninitialized. Please add explicit handling for the zero-chunk case.
|
当前我们的编译配置还未使能CONFIG_INTEL_IFS,经使用LLVM20手工测试,使能该配置项时可编译通过。 |
bugzilla: https://bugzilla.openanolis.cn/show_bug.cgi?id=8013
Intel In Field Scan (IFS) is a hardware feature to run circuit level tests on a CPU core to detect problems that are not caught by parity or ECC checks.
This PR is to support In Field Scan(IFS) SAF & Array BIST on GNR & SRF platforms.
It is upstreamed in v6.7-rc1:
https://lore.kernel.org/all/20231005195137.3117166-1-jithu.joseph@intel.com/
Upstream commits from v6.7-rc1:
06d65b2 platform/x86/intel/ifs: ARRAY BIST for Sierra Forest
b9aa9e4 platform/x86/intel/ifs: Add new error code
e6483a0 platform/x86/intel/ifs: Add new CPU support
60d2e1b platform/x86/intel/ifs: Metadata validation for start_chunk
25a76db platform/x86/intel/ifs: Validate image size
72b96ee platform/x86/intel/ifs: Gen2 Scan test support
07f47c0 platform/x86/intel/ifs: Gen2 scan image loading
a138ac2 platform/x86/intel/ifs: Refactor image loading code
97a5e80 platform/x86/intel/ifs: Store IFS generation number
(deepin: Drop 25a76db ("platform/x86/intel/ifs: Validate image size")、72b96ee29ed6f7670bbb180ba694816e33d361d1 ("platform/x86/intel/ifs: Gen2 Scan test support") and 97a5e80 ("platform/x86/intel/ifs: Store IFS generation number") because of merged before.)
Fix commit from upstream v6.7.2:
e8931eb platform/x86/intel/ifs: Call release_firmware() when handling errors.
(deepin: Droped because of merged before.)
One commit is to add kernel config for IFS:
51d84a97546446c55203a0961cce317b7e70937e x86: configs: Add Intel In Field Scan(IFS) kernel config
(deepin: Skiped.)
Test
Built and run the kernel successfully.
Test is PASS on GNR & SRF platforms.
Configs
CONFIG_INTEL_IFS = m
Link: https://gitee.com/anolis/cloud-kernel/pulls/2688
Summary by Sourcery
Support Intel In Field Scan (IFS) SAF and Array BIST on Granite Rapids and Sierra Forest platforms by upstreaming Gen2 scan test logic, adding stride-aware chunk handling, new MSR definitions, enhanced error reporting, and generation-based CPU model integration.
New Features:
Enhancements: