[Deepin-Kernel-SIG] [linux 6.6-y] [Upstream] [Intel] drm/i915/display: correct dual pps handling for MTL_PCH+

[opsiff]

On the PCH side the second PPS was introduced in ICP+.Add condition On MTL_PCH and greater platform also having the second PPS.

Note that DG1/2 south block only has the single PPS, so need to exclude the fake DG1/2 PCHs

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11488
Fixes: 93cbc1a ("drm/i915/mtl: Add fake PCH for Meteor Lake")
Cc: stable@vger.kernel.org # v6.9+

Reviewed-by: Jani Nikula jani.nikula@intel.com

Link: https://patchwork.freedesktop.org/patch/msgid/20240801111141.574854-1-dnyaneshwar.bhadane@intel.com (cherry picked from commit da1878b)

(cherry picked from commit 1b85bdb)

Summary by Sourcery

Bug Fixes:

• Enable dual backlight controllers and PPS instances for MTL_PCH+ platforms

[sourcery-ai]

Reviewer's Guide

Introduces explicit handling for Meteor Lake (MTL) PCH and newer platforms to correctly report two panel power sequencers (PPS) and backlight controllers, while preserving single-PPS behavior for DG1/DG2 south blocks.

Sequence diagram for i915 GetControllerCount logic with MTL PCH update

sequenceDiagram
    participant DS as Display System
    participant I915 as i915 Driver
    participant PCH as PCH Hardware

    DS->>I915: GetControllerCount()
    activate I915
    I915->>PCH: GetPCHType()
    activate PCH
    PCH-->>I915: PCH_Info (e.g., MTL, DG1, other)
    deactivate PCH
    alt PCH_TYPE is MTL or newer
        I915-->>DS: Returns 2 controllers
    else PCH_TYPE is DG1 (and not MTL+)
        I915-->>DS: Returns 1 controller
    else Other PCH types
        I915-->>DS: Returns count based on prior logic
    end
    deactivate I915

Loading

Class diagram for modified functions in i915 display driver

classDiagram
  class `intel_backlight.c` {
    +cnp_num_backlight_controllers(struct drm_i915_private *i915) int
  }
  class `intel_pps.c` {
    +intel_num_pps(struct drm_i915_private *i915) int
  }

  `intel_backlight.c` : contains modified cnp_num_backlight_controllers
  `intel_pps.c` : contains modified intel_num_pps

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File-Level Changes

Change	Details	Files
Enable dual backlight controller support on MTL and newer PCH	Insert conditional check for PCH_MTL or later before existing DG1 check Return 2 controllers when INTEL_PCH_TYPE(i915) >= PCH_MTL	drivers/gpu/drm/i915/display/intel_backlight.c
Enable dual PPS support on MTL and newer PCH	Add INTEL_PCH_TYPE(i915) >= PCH_MTL conditional in intel_num_pps() Return 2 PPS when running on MTL or later platforms	drivers/gpu/drm/i915/display/intel_pps.c

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[deepin-ci-robot]

[APPROVALNOTIFIER] This PR is NOT APPROVED

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[Avenger-285714]

why cherry-picked 2 times with different commit id...

[Avenger-285714]

please add "commit xxx upstream." or "[ Upstream commit xxx ]" in commit msg.

[sourcery-ai]

Hey @opsiff - I've reviewed your changes - here's some feedback:

• Consider refactoring the PCH >= MTL dual-controller logic into a shared helper to avoid duplicating it in both intel_backlight and intel_pps.
• Add a code comment near the PCH type comparisons to clarify why the >= PCH_MTL check precedes the >= PCH_DG1 check and ensures DG1/DG2 are excluded.

Here's what I looked at during the review

• 🟢 General issues: all looks good
• 🟢 Security: all looks good
• 🟢 Testing: all looks good
• 🟢 Complexity: all looks good
• 🟢 Documentation: all looks good

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[deepin-ci-robot]

deepin pr auto review

代码审查意见：

1. 代码重复：在intel_backlight.c和intel_pps.c文件中，INTEL_PCH_TYPE(i915) >= PCH_MTL的条件判断和返回值2是重复的。建议将这部分代码提取到一个公共函数中，以减少代码重复和提高代码的可维护性。

2. 条件判断的顺序：在intel_backlight.c和intel_pps.c文件中，条件判断的顺序是先判断PCH_MTL，然后是PCH_DG1。这种顺序可能会导致在某些情况下返回错误的值。建议将条件判断的顺序调整为先判断PCH_DG1，然后是PCH_MTL，以确保返回正确的值。

3. 缺少注释：在intel_backlight.c和intel_pps.c文件中，新增的条件判断和返回值缺少相应的注释说明。建议添加注释，以便其他开发者理解代码的意图和逻辑。

4. 代码风格：在intel_backlight.c和intel_pps.c文件中，新增的条件判断和返回值与之前的代码风格不一致。建议统一代码风格，以提高代码的可读性。

综上所述，建议对代码进行重构，提取公共函数，调整条件判断的顺序，添加注释，并统一代码风格。

[opsiff]

please add "commit xxx upstream." or "[ Upstream commit xxx ]" in commit msg.

up

please add "commit xxx upstream." or "[ Upstream commit xxx ]" in commit msg.

OK

[opsiff]

why cherry-picked 2 times with different commit id...

it contains in v6.12-rc1 and cherry-pick to v6.11-rc3