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This changes the identifier lookup to use the scope stack instead of the parent pointer chain. The ordering of the scopes used for Verilog identifier lookup does not necessarily match the parent child ordering. As an example, modules are in the "definition" or root scope, visible across compilation unit, but identifiers in the compilation unit scope in which the module is defined are nevertheless visible in the module.
kroening
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tautschnig
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Apr 22, 2026
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This changes the identifier lookup to use the scope stack instead of the parent pointer chain.
The ordering of the scopes used for Verilog identifier lookup does not necessarily match the parent child ordering. As an example, modules are in the "definition" or root scope, visible across compilation unit, but identifiers in the compilation unit scope in which the module is defined are nevertheless visible in the module.