JIT: stop emitting x86 per-register write barrier helpers

Match what x64 and other targets already do: always emit a call to the unified CORINFO_HELP_ASSIGN_REF / CORINFO_HELP_CHECKED_ASSIGN_REF helper instead of selecting between per-source-register specialized helpers (CORINFO_HELP_ASSIGN_REF_EAX, etc.).

The runtime universal helper already has the narrow ABI: ecx = dst, edx = src, only eax/edx trashed, all callee-saved registers and ecx preserved. The JIT continues to use RBM_CALLEE_TRASH_WRITEBARRIER (RBM_EAX | RBM_EDX) as the kill set, so it knows what's preserved across the call.

This follows the same JIT-only first-step pattern as #128542 (Remove CORINFO_HELP_ASSIGN_BYREF). The enum values, jithelpers.h, readytorunhelpers.h, R2R format, runtime asm helpers (jithelp.asm/S, WriteBarriers.asm/S), jitinterfacex86.cpp, excep.cpp, and AOT tools are intentionally left alone for a follow-up cleanup similar to #128687.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>

Author: EgorBo

src/coreclr/jit/codegen.h

@@ -1270,7 +1270,6 @@ class CodeGen final : public CodeGenInterface
                                       regNumber     targetReg,
                                       GenTreeIndir* indir,
                                       bool*         needsBarrier);
-    bool        genEmitOptimizedGCWriteBarrier(GCInfo::WriteBarrierForm writeBarrierForm, GenTree* addr, GenTree* data);
     GenTree*    getCallTarget(const GenTreeCall* call, CORINFO_METHOD_HANDLE* methHnd);
     regNumber   getCallIndirectionCellReg(GenTreeCall* call);
     void        genCall(GenTreeCall* call);

src/coreclr/jit/codegencommon.cpp

@@ -925,23 +925,6 @@ regMaskTP Compiler::compHelperCallKillSet(CorInfoHelpFunc helper)
         case CORINFO_HELP_PROF_FCN_TAILCALL:
             return RBM_PROFILER_TAILCALL_TRASH;
 
-#ifdef TARGET_X86
-        case CORINFO_HELP_ASSIGN_REF_EAX:
-        case CORINFO_HELP_ASSIGN_REF_ECX:
-        case CORINFO_HELP_ASSIGN_REF_EBX:
-        case CORINFO_HELP_ASSIGN_REF_EBP:
-        case CORINFO_HELP_ASSIGN_REF_ESI:
-        case CORINFO_HELP_ASSIGN_REF_EDI:
-
-        case CORINFO_HELP_CHECKED_ASSIGN_REF_EAX:
-        case CORINFO_HELP_CHECKED_ASSIGN_REF_ECX:
-        case CORINFO_HELP_CHECKED_ASSIGN_REF_EBX:
-        case CORINFO_HELP_CHECKED_ASSIGN_REF_EBP:
-        case CORINFO_HELP_CHECKED_ASSIGN_REF_ESI:
-        case CORINFO_HELP_CHECKED_ASSIGN_REF_EDI:
-            return RBM_EDX;
-#endif
-
         case CORINFO_HELP_STOP_FOR_GC:
             return RBM_STOP_FOR_GC_TRASH;
 
@@ -2663,55 +2646,6 @@ void CodeGen::genReportEHClauses(EHClauseInfo* clauses)
     }
 }
 
-#ifndef TARGET_WASM
-
-//----------------------------------------------------------------------
-// genUseOptimizedWriteBarriers: Determine if an optimized write barrier
-// helper should be used.
-//
-// Arguments:
-//   wbf - The WriteBarrierForm of the write (GT_STOREIND) that is happening.
-//
-// Return Value:
-//   true if an optimized write barrier helper should be used, false otherwise.
-//   Note: only x86 implements register-specific source optimized write
-//   barriers currently.
-//
-bool CodeGenInterface::genUseOptimizedWriteBarriers(GCInfo::WriteBarrierForm wbf)
-{
-#if defined(TARGET_X86) && NOGC_WRITE_BARRIERS
-    return true;
-#else
-    return false;
-#endif
-}
-
-//----------------------------------------------------------------------
-// genUseOptimizedWriteBarriers: Determine if an optimized write barrier
-// helper should be used.
-//
-// This has the same functionality as the version of
-// genUseOptimizedWriteBarriers that takes a WriteBarrierForm, but avoids
-// determining what the required write barrier form is, if possible.
-//
-// Arguments:
-//   store - the GT_STOREIND node
-//
-// Return Value:
-//   true if an optimized write barrier helper should be used, false otherwise.
-//   Note: only x86 implements register-specific source optimized write
-//   barriers currently.
-//
-bool CodeGenInterface::genUseOptimizedWriteBarriers(GenTreeStoreInd* store)
-{
-#if defined(TARGET_X86) && NOGC_WRITE_BARRIERS
-    return true;
-#else
-    return false;
-#endif
-}
-#endif // !TARGET_WASM
-
 //----------------------------------------------------------------------
 // genWriteBarrierHelperForWriteBarrierForm: Given a write barrier form
 // return the corresponding helper.
@@ -2722,9 +2656,6 @@ bool CodeGenInterface::genUseOptimizedWriteBarriers(GenTreeStoreInd* store)
 // Return Value:
 //   Write barrier helper to use.
 //
-// Note: do not call this function to get an optimized write barrier helper (e.g.,
-// for x86).
-//
 CorInfoHelpFunc CodeGenInterface::genWriteBarrierHelperForWriteBarrierForm(GCInfo::WriteBarrierForm wbf)
 {
     INDEBUG(genWriteBarrierUsed = true);

src/coreclr/jit/codegeninterface.h

@@ -238,8 +238,6 @@ class CodeGenInterface
     TreeLifeUpdater<true>* treeLifeUpdater;
 
 public:
-    bool            genUseOptimizedWriteBarriers(GCInfo::WriteBarrierForm wbf);
-    bool            genUseOptimizedWriteBarriers(GenTreeStoreInd* store);
     CorInfoHelpFunc genWriteBarrierHelperForWriteBarrierForm(GCInfo::WriteBarrierForm wbf);
 
 #ifdef DEBUG

src/coreclr/jit/codegenxarch.cpp

@@ -5325,11 +5325,6 @@ void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
         // Consume both registers so that any copies of interfering registers are taken care of.
         genConsumeOperands(tree);
 
-        if (genEmitOptimizedGCWriteBarrier(writeBarrierForm, addr, data))
-        {
-            return;
-        }
-
         // At this point, we should not have any interference.
         // That is, 'data' must not be in REG_WRITE_BARRIER_DST, as that is where 'addr' must go.
         noway_assert(data->GetRegNum() != REG_WRITE_BARRIER_DST);
@@ -5668,99 +5663,6 @@ void CodeGen::genCodeForSwap(GenTreeOp* tree)
     gcInfo.gcMarkRegPtrVal(oldOp1Reg, type2);
 }
 
-//------------------------------------------------------------------------
-// genEmitOptimizedGCWriteBarrier: Generate write barrier store using the optimized
-// helper functions.
-//
-// Arguments:
-//    writeBarrierForm - the write barrier form to use
-//    addr - the address at which to do the store
-//    data - the data to store
-//
-// Return Value:
-//    true if an optimized write barrier form was used, false if not. If this
-//    function returns false, the caller must emit a "standard" write barrier.
-
-bool CodeGen::genEmitOptimizedGCWriteBarrier(GCInfo::WriteBarrierForm writeBarrierForm, GenTree* addr, GenTree* data)
-{
-    assert(writeBarrierForm != GCInfo::WBF_NoBarrier);
-
-#if defined(TARGET_X86) && NOGC_WRITE_BARRIERS
-    if (!genUseOptimizedWriteBarriers(writeBarrierForm))
-    {
-        return false;
-    }
-
-    const static int regToHelper[2][8] = {
-        // If the target is known to be in managed memory
-        {
-            CORINFO_HELP_ASSIGN_REF_EAX, // EAX
-            CORINFO_HELP_ASSIGN_REF_ECX, // ECX
-            -1,                          // EDX (always the target address)
-            CORINFO_HELP_ASSIGN_REF_EBX, // EBX
-            -1,                          // ESP
-            CORINFO_HELP_ASSIGN_REF_EBP, // EBP
-            CORINFO_HELP_ASSIGN_REF_ESI, // ESI
-            CORINFO_HELP_ASSIGN_REF_EDI, // EDI
-        },
-
-        // Don't know if the target is in managed memory
-        {
-            CORINFO_HELP_CHECKED_ASSIGN_REF_EAX, // EAX
-            CORINFO_HELP_CHECKED_ASSIGN_REF_ECX, // ECX
-            -1,                                  // EDX (always the target address)
-            CORINFO_HELP_CHECKED_ASSIGN_REF_EBX, // EBX
-            -1,                                  // ESP
-            CORINFO_HELP_CHECKED_ASSIGN_REF_EBP, // EBP
-            CORINFO_HELP_CHECKED_ASSIGN_REF_ESI, // ESI
-            CORINFO_HELP_CHECKED_ASSIGN_REF_EDI, // EDI
-        },
-    };
-
-    noway_assert(regToHelper[0][REG_EAX] == CORINFO_HELP_ASSIGN_REF_EAX);
-    noway_assert(regToHelper[0][REG_ECX] == CORINFO_HELP_ASSIGN_REF_ECX);
-    noway_assert(regToHelper[0][REG_EBX] == CORINFO_HELP_ASSIGN_REF_EBX);
-    noway_assert(regToHelper[0][REG_ESP] == -1);
-    noway_assert(regToHelper[0][REG_EBP] == CORINFO_HELP_ASSIGN_REF_EBP);
-    noway_assert(regToHelper[0][REG_ESI] == CORINFO_HELP_ASSIGN_REF_ESI);
-    noway_assert(regToHelper[0][REG_EDI] == CORINFO_HELP_ASSIGN_REF_EDI);
-
-    noway_assert(regToHelper[1][REG_EAX] == CORINFO_HELP_CHECKED_ASSIGN_REF_EAX);
-    noway_assert(regToHelper[1][REG_ECX] == CORINFO_HELP_CHECKED_ASSIGN_REF_ECX);
-    noway_assert(regToHelper[1][REG_EBX] == CORINFO_HELP_CHECKED_ASSIGN_REF_EBX);
-    noway_assert(regToHelper[1][REG_ESP] == -1);
-    noway_assert(regToHelper[1][REG_EBP] == CORINFO_HELP_CHECKED_ASSIGN_REF_EBP);
-    noway_assert(regToHelper[1][REG_ESI] == CORINFO_HELP_CHECKED_ASSIGN_REF_ESI);
-    noway_assert(regToHelper[1][REG_EDI] == CORINFO_HELP_CHECKED_ASSIGN_REF_EDI);
-
-    regNumber reg = data->GetRegNum();
-    noway_assert((reg != REG_ESP) && (reg != REG_OPTIMIZED_WRITE_BARRIER_DST));
-
-    // Generate the following code:
-    //            lea     edx, addr
-    //            call    write_barrier_helper_reg
-
-    // addr goes in REG_OPTIMIZED_WRITE_BARRIER_DST
-    genCopyRegIfNeeded(addr, REG_OPTIMIZED_WRITE_BARRIER_DST);
-
-    unsigned tgtAnywhere = 0;
-    if (writeBarrierForm != GCInfo::WBF_BarrierUnchecked)
-    {
-        tgtAnywhere = 1;
-    }
-
-    // Here we might want to call a modified version of genGCWriteBarrier() to get the benefit
-    // of the FEATURE_COUNT_GC_WRITE_BARRIERS code. For now, just emit the helper call directly.
-    genEmitHelperCall(regToHelper[tgtAnywhere][reg],
-                      0,           // argSize
-                      EA_PTRSIZE); // retSize
-
-    return true;
-#else  // !defined(TARGET_X86) || !NOGC_WRITE_BARRIERS
-    return false;
-#endif // !defined(TARGET_X86) || !NOGC_WRITE_BARRIERS
-}
-
 // Produce code for a GT_CALL node
 void CodeGen::genCall(GenTreeCall* call)
 {

src/coreclr/jit/lsrabuild.cpp

@@ -677,20 +677,9 @@ regMaskTP LinearScan::getKillSetForStoreInd(GenTreeStoreInd* tree)
     GCInfo::WriteBarrierForm writeBarrierForm = m_compiler->codeGen->gcInfo.gcIsWriteBarrierCandidate(tree);
     if (writeBarrierForm != GCInfo::WBF_NoBarrier)
     {
-        if (m_compiler->codeGen->genUseOptimizedWriteBarriers(writeBarrierForm))
-        {
-            // We can't determine the exact helper to be used at this point, because it depends on
-            // the allocated register for the `data` operand. However, all the (x86) optimized
-            // helpers have the same kill set: EDX. And note that currently, only x86 can return
-            // `true` for genUseOptimizedWriteBarriers().
-            killMask = RBM_CALLEE_TRASH_NOGC;
-        }
-        else
-        {
-            // Figure out which helper we're going to use, and then get the kill set for that helper.
-            CorInfoHelpFunc helper = m_compiler->codeGen->genWriteBarrierHelperForWriteBarrierForm(writeBarrierForm);
-            killMask               = m_compiler->compHelperCallKillSet(helper);
-        }
+        // Figure out which helper we're going to use, and then get the kill set for that helper.
+        CorInfoHelpFunc helper = m_compiler->codeGen->genWriteBarrierHelperForWriteBarrierForm(writeBarrierForm);
+        killMask               = m_compiler->compHelperCallKillSet(helper);
     }
     return killMask;
 }
@@ -4542,20 +4531,6 @@ int LinearScan::BuildGCWriteBarrier(GenTree* tree)
     SingleTypeRegSet addrCandidates = RBM_WRITE_BARRIER_DST.GetIntRegSet();
     SingleTypeRegSet srcCandidates  = RBM_WRITE_BARRIER_SRC.GetIntRegSet();
 
-#if defined(TARGET_X86) && NOGC_WRITE_BARRIERS
-
-    bool useOptimizedWriteBarrierHelper = m_compiler->codeGen->genUseOptimizedWriteBarriers(tree->AsStoreInd());
-    if (useOptimizedWriteBarrierHelper)
-    {
-        // Special write barrier:
-        // op1 (addr) goes into REG_OPTIMIZED_WRITE_BARRIER_DST (rdx) and
-        // op2 (src) goes into any int register.
-        addrCandidates = RBM_OPTIMIZED_WRITE_BARRIER_DST.GetIntRegSet();
-        srcCandidates  = RBM_OPTIMIZED_WRITE_BARRIER_SRC.GetIntRegSet();
-    }
-
-#endif // defined(TARGET_X86) && NOGC_WRITE_BARRIERS
-
     BuildUse(addr, addrCandidates);
     BuildUse(src, srcCandidates);
 

src/coreclr/jit/targetamd64.h

@@ -61,7 +61,6 @@
                                          // MAX_MULTIREG_COUNT - 1.
 #endif // !UNIX_AMD64_ABI
 
-#define NOGC_WRITE_BARRIERS      0       // We DO-NOT have specialized WriteBarrier JIT Helpers that DO-NOT trash the RBM_CALLEE_TRASH registers
 #define USER_ARGS_COME_LAST      1
 #define TARGET_POINTER_SIZE      8       // equal to sizeof(void*) and the managed pointer size in bytes for this target
 #ifdef    UNIX_AMD64_ABI

src/coreclr/jit/targetarm.h

@@ -33,7 +33,6 @@
 #define MAX_MULTIREG_COUNT            4  // Maximum number of registers defined by a single instruction (including calls).
                                          // This is also the maximum number of registers for a MultiReg node.
 
-#define NOGC_WRITE_BARRIERS      0       // We DO-NOT have specialized WriteBarrier JIT Helpers that DO-NOT trash the RBM_CALLEE_TRASH registers
 #define USER_ARGS_COME_LAST      1
 #define TARGET_POINTER_SIZE      4       // equal to sizeof(void*) and the managed pointer size in bytes for this target
 #define ETW_EBP_FRAMED           1       // if 1 we cannot use REG_FP as a scratch register and must setup the frame pointer for most methods

src/coreclr/jit/targetarm64.h

@@ -35,7 +35,6 @@
 #define MAX_MULTIREG_COUNT            4  // Maximum number of registers defined by a single instruction (including calls).
                                          // This is also the maximum number of registers for a MultiReg node.
 
-#define NOGC_WRITE_BARRIERS      1       // We have specialized WriteBarrier JIT Helpers that DO-NOT trash the RBM_CALLEE_TRASH registers
 #define USER_ARGS_COME_LAST      1
 #define TARGET_POINTER_SIZE      8       // equal to sizeof(void*) and the managed pointer size in bytes for this target
 #define ETW_EBP_FRAMED           1       // if 1 we cannot use REG_FP as a scratch register and must setup the frame pointer for most methods

src/coreclr/jit/targetloongarch64.h

@@ -40,7 +40,6 @@
 #define MAX_MULTIREG_COUNT            2  // Maximum number of registers defined by a single instruction (including calls).
                                            // This is also the maximum number of registers for a MultiReg node.
 
-#define NOGC_WRITE_BARRIERS      1       // We have specialized WriteBarrier JIT Helpers that DO-NOT trash the RBM_CALLEE_TRASH registers
 #define USER_ARGS_COME_LAST      1
 #define TARGET_POINTER_SIZE      8       // equal to sizeof(void*) and the managed pointer size in bytes for this target
 #define ETW_EBP_FRAMED           1       // if 1 we cannot use REG_FP as a scratch register and must setup the frame pointer for most methods

src/coreclr/jit/targetriscv64.h

@@ -35,7 +35,6 @@
 #define MAX_MULTIREG_COUNT            2  // Maximum number of registers defined by a single instruction (including calls).
                                          // This is also the maximum number of registers for a MultiReg node.
 
-#define NOGC_WRITE_BARRIERS      1       // We have specialized WriteBarrier JIT Helpers that DO-NOT trash the RBM_CALLEE_TRASH registers
 #define USER_ARGS_COME_LAST      1
 #define TARGET_POINTER_SIZE      8       // equal to sizeof(void*) and the managed pointer size in bytes for this target
 #define ETW_EBP_FRAMED           1       // if 1 we cannot use REG_FP as a scratch register and must setup the frame pointer for most methods