@@ -220,24 +220,21 @@ def get_torch_device(cls, device_id: int = 0) -> torch.device:
220220
221221 @classmethod
222222 def check_and_update_config (cls , aphrodite_config : "AphroditeConfig" ) -> None :
223- """Check and update vLLM configuration for Metal compatibility.
223+ """Check and update Aphrodite configuration for Metal compatibility.
224224
225225 Args:
226- aphrodite_config: vLLM configuration object
226+ aphrodite_config: Aphrodite configuration object
227227 """
228228 config = get_config ()
229229 parallel_config = aphrodite_config .parallel_config
230230 model_config = aphrodite_config .model_config
231231 compilation_config = aphrodite_config .compilation_config
232232
233233 # Metal execution is MLX-backed. Torch Inductor/CUDAGraph settings do
234- # not apply to the actual model path, so normalize them here rather
235- # than requiring users to pass --enforce- eager.
234+ # not apply to the actual model path, so disable those compilation
235+ # surfaces without overriding the user's eager-mode flag here .
236236 from aphrodite .config .compilation import CompilationMode , CUDAGraphMode
237237
238- if model_config is not None and not model_config .enforce_eager :
239- logger .info ("Metal: forcing eager mode; torch.compile/CUDAGraphs are not used on MLX." )
240- model_config .enforce_eager = True
241238 compilation_config .mode = CompilationMode .NONE
242239 compilation_config .cudagraph_mode = CUDAGraphMode .NONE
243240 compilation_config .max_cudagraph_capture_size = 0
@@ -385,7 +382,7 @@ def _find_non_ssm_backend(
385382 def update_block_size_for_backend (cls , aphrodite_config : "AphroditeConfig" ) -> None :
386383 """Update block_size for Metal platform.
387384
388- Delegates to vLLM 's base implementation, which reads the Metal kernel
385+ Delegates to Aphrodite 's base implementation, which reads the Metal kernel
389386 alignment (MultipleOf(16)) from our :meth:`_find_non_ssm_backend`
390387 override. Adds a one-time warning when paged attention is enabled for
391388 a hybrid model, explaining the cache-block-size translation mechanism
@@ -403,16 +400,16 @@ def update_block_size_for_backend(cls, aphrodite_config: "AphroditeConfig") -> N
403400 # block-size translation mechanism.
404401 #
405402 # Background:
406- # - vLLM requires block_size=160 (or larger) for hybrid models to satisfy
403+ # - Aphrodite requires block_size=160 (or larger) for hybrid models to satisfy
407404 # page size divisibility validation between SDPA and Mamba layers.
408405 #
409- # Solution (PR #235) :
410- # - vLLM sees a large block_size (e.g., 144 = 16 * 9) for its scheduler
406+ # Solution:
407+ # - Aphrodite sees a large block_size (e.g., 144 = 16 * 9) for its scheduler
411408 # validation.
412409 # - The Metal kernel uses a translated block_size (16, the kernel sweet
413410 # spot) that it supports.
414- # - Each vLLM block is split into ratio = cache_block_size / kernel_block_size
415- # kernel blocks. For example, one vLLM block of 144 tokens becomes 9 kernel
411+ # - Each Aphrodite block is split into ratio = cache_block_size / kernel_block_size
412+ # kernel blocks. For example, one Aphrodite block of 144 tokens becomes 9 kernel
416413 # blocks of 16 tokens each.
417414 # - The KV cache is reshaped (zero-copy) to match: [num_blocks, 144, ...] →
418415 # [num_blocks*9, 16, ...]. The physical memory layout is unchanged.
@@ -423,17 +420,17 @@ def update_block_size_for_backend(cls, aphrodite_config: "AphroditeConfig") -> N
423420 if model_config .is_hybrid and metal_config .use_paged_attention :
424421 logger .warning (
425422 "Hybrid model (e.g., Qwen3.5) with paged attention enabled. "
426- "Using block-size translation (PR #235) to convert vLLM 's large "
423+ "Using block-size translation (PR #235) to convert Aphrodite 's large "
427424 "block_size to a Metal kernel-compatible size.\n "
428- " Mechanism: Each vLLM block is split into multiple kernel blocks.\n "
429- " Example: vLLM block_size=144 → kernel block_size=16 (ratio=9).\n "
425+ " Mechanism: Each Aphrodite block is split into multiple kernel blocks.\n "
426+ " Example: Aphrodite block_size=144 → kernel block_size=16 (ratio=9).\n "
430427 " The KV cache is reshaped (zero-copy) and block tables are expanded.\n "
431428 " This is a logical transformation — physical memory is unchanged."
432429 )
433430
434431 # Delegate the rest to upstream. With our ``_find_non_ssm_backend``
435432 # returning :class:`MetalBackend` (which advertises ``MultipleOf(16)``),
436- # vLLM 's Phase 1 picks a kernel-aligned default of 16 for non-hybrid
433+ # Aphrodite 's Phase 1 picks a kernel-aligned default of 16 for non-hybrid
437434 # models (matching the kernel sweet spot), and Phase 2
438435 # (``_align_hybrid_block_size``) handles hybrid alignment. The kernel
439436 # layer (``_pick_kernel_block_size``) validates the final
@@ -453,10 +450,10 @@ def get_attn_backend_cls(
453450 if selected_backend and selected_backend != AttentionBackendEnum .CPU_ATTN :
454451 logger .info (f"Cannot use { selected_backend } backend on Metal/MLX." )
455452 if attn_selector_config .use_mla :
456- # MLA attention is handled by the vllm- metal model runner (MLAPagedAttentionWrapper),
457- # not by vLLM 's attention backend selector. Continue to return CPU_ATTN below.
453+ # MLA attention is handled by the aphrodite metal model runner (MLAPagedAttentionWrapper),
454+ # not by Aphrodite 's attention backend selector. Continue to return CPU_ATTN below.
458455 logger .info (
459- "MLA model detected; attention handled by vllm- metal model runner"
456+ "MLA model detected; attention handled by aphrodite metal model runner"
460457 )
461458 if attn_selector_config .use_sparse :
462459 raise NotImplementedError ("Sparse Attention is not supported on Metal/MLX." )
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