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Merge pull request #501 from akifejaz/rv64-gnu-port
Removed dead code from riscv64/gnu port
2 parents 4de9be7 + c1bff3a commit 0a0615a

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2 files changed

+11
-78
lines changed

2 files changed

+11
-78
lines changed

ports/risc-v64/gnu/inc/tx_port.h

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Original file line numberDiff line numberDiff line change
@@ -53,6 +53,8 @@
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#ifndef TX_PORT_H
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#define TX_PORT_H
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#ifndef __ASSEMBLER__
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/* Include for memset. */
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#include <string.h>
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@@ -68,10 +70,14 @@
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#include "tx_user.h"
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#endif /* TX_INCLUDE_USER_DEFINE_FILE */
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#endif /* __ASSEMBLER__ */
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/* Define ThreadX basic types for this port. */
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#define VOID void
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#ifndef __ASSEMBLER__
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typedef char CHAR;
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typedef unsigned char UCHAR;
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typedef int INT;
@@ -82,6 +88,7 @@ typedef unsigned long long ULONG64;
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typedef short SHORT;
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typedef unsigned short USHORT;
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#define ULONG64_DEFINED
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#endif /* __ASSEMBLER__ */
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@@ -230,7 +237,9 @@ typedef unsigned short USHORT;
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/* Expose helper used to perform an atomic read/modify/write of mstatus.
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The helper composes and returns the posture per ThreadX contract. */
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#ifndef __ASSEMBLER__
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UINT _tx_thread_interrupt_control(UINT new_posture);
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#endif
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#ifdef TX_DISABLE_INLINE
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@@ -270,11 +279,13 @@ UINT _tx_thread_interrupt_control(UIN
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/* Define the version ID of ThreadX. This may be utilized by the application. */
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#ifndef __ASSEMBLER__
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#ifdef TX_THREAD_INIT
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CHAR _tx_version_id[] =
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"Copyright (c) 2024 Microsoft Corporation. * ThreadX RISC-V64/GNU Version 6.4.2 *";
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#else
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extern CHAR _tx_version_id[];
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#endif /* TX_THREAD_INIT */
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#endif /* __ASSEMBLER__ */
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#endif /* TX_PORT_H */

ports/risc-v64/gnu/src/tx_thread_context_save.S

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Original file line numberDiff line numberDiff line change
@@ -260,84 +260,6 @@ _tx_thread_not_nested_save:
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ld sp, 0(t0) // Switch to system stack
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ret // Return to calling ISR
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sd x17, 20*8(sp) // Store a7
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sd x28, 16*8(sp) // Store t3
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sd x29, 15*8(sp) // Store t4
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sd x30, 14*8(sp) // Store t5
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sd x31, 13*8(sp) // Store t6
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csrr t0, mepc // Load exception program counter
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sd t0, 30*8(sp) // Save it on the stack
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/* Save floating point scratch registers. */
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#if defined(__riscv_float_abi_single)
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fsw f0, 31*8(sp) // Store ft0
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fsw f1, 32*8(sp) // Store ft1
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fsw f2, 33*8(sp) // Store ft2
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fsw f3, 34*8(sp) // Store ft3
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fsw f4, 35*8(sp) // Store ft4
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fsw f5, 36*8(sp) // Store ft5
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fsw f6, 37*8(sp) // Store ft6
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fsw f7, 38*8(sp) // Store ft7
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fsw f10,41*8(sp) // Store fa0
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fsw f11,42*8(sp) // Store fa1
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fsw f12,43*8(sp) // Store fa2
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fsw f13,44*8(sp) // Store fa3
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fsw f14,45*8(sp) // Store fa4
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fsw f15,46*8(sp) // Store fa5
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fsw f16,47*8(sp) // Store fa6
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fsw f17,48*8(sp) // Store fa7
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fsw f28,59*8(sp) // Store ft8
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fsw f29,60*8(sp) // Store ft9
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fsw f30,61*8(sp) // Store ft10
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fsw f31,62*8(sp) // Store ft11
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csrr t0, fcsr
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sd t0, 63*8(sp) // Store fcsr
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#elif defined(__riscv_float_abi_double)
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fsd f0, 31*8(sp) // Store ft0
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fsd f1, 32*8(sp) // Store ft1
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fsd f2, 33*8(sp) // Store ft2
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fsd f3, 34*8(sp) // Store ft3
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fsd f4, 35*8(sp) // Store ft4
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fsd f5, 36*8(sp) // Store ft5
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fsd f6, 37*8(sp) // Store ft6
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fsd f7, 38*8(sp) // Store ft7
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fsd f10,41*8(sp) // Store fa0
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fsd f11,42*8(sp) // Store fa1
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fsd f12,43*8(sp) // Store fa2
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fsd f13,44*8(sp) // Store fa3
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fsd f14,45*8(sp) // Store fa4
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fsd f15,46*8(sp) // Store fa5
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fsd f16,47*8(sp) // Store fa6
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fsd f17,48*8(sp) // Store fa7
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fsd f28,59*8(sp) // Store ft8
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fsd f29,60*8(sp) // Store ft9
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fsd f30,61*8(sp) // Store ft10
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fsd f31,62*8(sp) // Store ft11
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csrr t0, fcsr
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sd t0, 63*8(sp) // Store fcsr
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#endif
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/* Save the current stack pointer in the thread's control block. */
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/* _tx_thread_current_ptr -> tx_thread_stack_ptr = sp; */
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/* Switch to the system stack. */
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/* sp = _tx_thread_system_stack_ptr; */
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la x5, _tx_thread_current_ptr // Pickup current thread pointer address
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ld t1, 0(x5) // Pickup current thread pointer
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sd sp, 16(t1) // Save stack pointer
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#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
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/* _tx_execution_isr_enter is called with thread stack pointer */
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call _tx_execution_isr_enter // Call the ISR execution enter function
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#endif
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la x5, _tx_thread_system_stack_ptr // Pickup system stack pointer address
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ld sp, 0(x5) // Switch to system stack
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ret // Return to calling ISR
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/* }
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else
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{ */

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