Merge pull request #278 from Polarisru/master

Fixed SysTick initialization problem in tx_initialize_low_level.s for Cortex-M0.

Author: fdesbiens

ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s

@@ -169,6 +169,9 @@ _tx_initialize_low_level
 ;    /* Configure SysTick.  */
 ;
     LDR     r0, =0xE000E000                         ; Build address of NVIC registers
+    LDR     r1, =0
+    STR     r1, [r0, #0x10]                         ; Reset SysTick Control
+    STR     r1, [r0, #0x18]                         ; Reset SysTick Counter Value
     LDR     r1, =SYSTICK_CYCLES
     STR     r1, [r0, #0x14]                         ; Setup SysTick Reload Value
     MOVS    r1, #0x7                                ; Build SysTick Control Enable Value

ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S

@@ -123,6 +123,9 @@ _tx_initialize_low_level:
 @    /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference.  */
 @
     LDR     r0, =0xE000E000                         @ Build address of NVIC registers
+    LDR     r1, =0
+    STR     r1, [r0, #0x10]                         // Reset SysTick Control
+    STR     r1, [r0, #0x18]                         // Reset SysTick Counter Value
     LDR     r1, =SYSTICK_CYCLES
     STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
     LDR     r1, =0x7                                // Build SysTick Control Enable Value

ports/cortex_m0/iar/example_build/tx_initialize_low_level.s

@@ -118,6 +118,9 @@ _tx_initialize_low_level:
 ;    /* Configure SysTick.  */
 ;
     LDR     r0, =0xE000E000                         ; Build address of NVIC registers
+    LDR     r1, =0
+    STR     r1, [r0, #0x10]                         ; Reset SysTick Control
+    STR     r1, [r0, #0x18]                         ; Reset SysTick Counter Value
     LDR     r1, =SYSTICK_CYCLES
     STR     r1, [r0, #0x14]                         ; Setup SysTick Reload Value
     MOVS    r1, #0x7                                ; Build SysTick Control Enable Value

ports/cortex_m0/keil/example_build/tx_initialize_low_level.s

@@ -169,6 +169,9 @@ _tx_initialize_low_level
 ;    /* Configure SysTick.  */
 ;
     LDR     r0, =0xE000E000                         ; Build address of NVIC registers
+    LDR     r1, =0
+    STR     r1, [r0, #0x10]                         ; Reset SysTick Control
+    STR     r1, [r0, #0x18]                         ; Reset SysTick Counter Value
     LDR     r1, =SYSTICK_CYCLES
     STR     r1, [r0, #0x14]                         ; Setup SysTick Reload Value
     MOVS    r1, #0x7                                ; Build SysTick Control Enable Value