From bedf31733946cdbf9ec015e3112dd97c575c0dca Mon Sep 17 00:00:00 2001 From: cpdpls Date: Tue, 14 Apr 2026 20:19:50 +0200 Subject: [PATCH] Fixed MPIE being cleared leading to have interrupts being disable when returning from machine mode --- .../gnu/src/tx_thread_context_restore.S | 29 ++++++++----------- 1 file changed, 12 insertions(+), 17 deletions(-) diff --git a/ports/risc-v64/gnu/src/tx_thread_context_restore.S b/ports/risc-v64/gnu/src/tx_thread_context_restore.S index 4473a39b..7fa45b77 100644 --- a/ports/risc-v64/gnu/src/tx_thread_context_restore.S +++ b/ports/risc-v64/gnu/src/tx_thread_context_restore.S @@ -175,18 +175,11 @@ _tx_thread_context_restore: Set MPIE and restore MPP to Machine, preserve other fields. */ csrr t1, mstatus + li t2, 0x1880 // Set MPP(0x1800) | MPIE(0x80) + li t3, ~0x8 // Preserve all bits except MIE - /* Clear MPP/MPIE/MIE bits in t1 then set desired values. */ - - li t2, 0x1888 // MPP(0x1800) | MPIE(0x80) | MIE(0x08) - li t3, 0x1800 // Set MPP to Machine mode (bits 12:11) - - /* Construct new mstatus in t1: clear mask bits, set MPP/MPIE and optionally FP bit, - preserve everything except the bits we will modify. */ - - li t4, ~0x1888 // Clear mask for MPP/MPIE/MIE - and t1, t1, t4 - or t1, t1, t3 + or t1, t1, t2 // MPP and MPIE are now set + and t1, t1, t2 // Clear MIE, Hardware will restore it from MPIE #if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double) li t0, 0x2000 // Set FS bits (bits 14:13 to 01) for FP state @@ -352,14 +345,16 @@ _tx_thread_no_preempt_restore: ld t0, 30*8(sp) // Recover mepc csrw mepc, t0 // Setup mepc - /* Compose mstatus via read/modify/write to avoid clobbering unrelated bits. */ + + /* Compose mstatus via read/modify/write to avoid clobbering unrelated bits. + Set MPIE and restore MPP to Machine, preserve other fields. */ csrr t1, mstatus - li t2, 0x1888 // MPP(0x1800) | MPIE(0x80) | MIE(0x08) - li t3, 0x1800 // Set MPP to Machine mode - li t4, ~0x1888 // Clear mask for MPP/MPIE/MIE - and t1, t1, t4 - or t1, t1, t3 + li t2, 0x1880 // Set MPP(0x1800) | MPIE(0x80) + li t3, ~0x8 // Preserve all bits except MIE + + or t1, t1, t2 // MPP and MPIE are now set + and t1, t1, t2 // Clear MIE, Hardware will restore it from MPIE #if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double) li t0, 0x2000 // Set FS bits for FP state