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Aarch64 PVH checks #156

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@aerosouund

On looking at the virtualization checks, i saw that it uses the kernel msr module to read some x86 specific registers for amd and intel and check the bits that encode virtualization support. But currently the same checks for arm are absent.
I did a little digging on how you can check virtualization support on an arm cpu and saw that you would typically use the mrs instruction against the ID_AA64PFR0_EL1 system register that encodes the hardware features and read a certain group of bits as well. This register is part of the arm cpu spec and is guaranteed to exist on all implementations (graviton, apple silicon.. etc)

Does this match what you originally intended to do ?
I'd love to take on this and add the implementation and hear your thoughts
@bleggett

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