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emlearn / emlearn-micropython Public

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Fork 19
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Enable RISC-V support in CI#46

Merged

jonnor merged 10 commits into

masteremlearn/emlearn-micropython:masterfrom

riscvemlearn/emlearn-micropython:riscvCopy head branch name to clipboard

Aug 13, 2025

Conversation Commits10 (10)Checks Files changed

Merged

Enable RISC-V support in CI#46
jonnor merged 10 commits into
masterfrom
riscv

Commits

Commits on Aug 13, 2025

CI: Try setup RISCV build for ESP32-C6
jonnor
committed
CI: Disable C6 extmod build
jonnor
committed
README: Improve build instructions for developers
jonnor
committed
emlearn_iir_q15: Remove custom memset
jonnor
committed
Revert "emlearn_iir_q15: Remove custom memset"
jonnor
committed
emlearn_iir_q15: Use weak linkage for memset and memcpy
jonnor
committed
emlearn_iir_q15: Try avoid duplicate symbol on RISC-V
jonnor
committed
requirements: Add setuptools
jonnor
committed
CI: Add RISC-V as dependency for deploy step
jonnor
committed
emlearn_iir_q15: Try other way to avoid memset on RISC-V
jonnor
committed

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