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emraineyemrainey
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Per Family Drivers
What's Wrong: * H7xx drivers are not compatible with F4xx drivers. How Was it Fixed (if not obvious): * Split all drivers except RNG and Timer2 into separate copies. * Timer2 has an #ifdef for now * RNG is the same for both What side effects does this have (could be none): * Some drivers are very different. * Interface changes to Jarnax require multiple board tests. Which builds did you run to make sure they build? [X] arm-none-eabi-gcc Cortex M4 [X] arm-none-eabi-gcc Cortex M7 [X] (Apple) Native Clang [ ] (Apple) Homebrew GCC [X] (Apple) Homebrew LLVM How Do We Know and Can Show It's Fixed: * Builds (other tests are ongoing) Which Unittest Series did you Check? [X] (Apple) Native Clang [ ] (Apple) Homebrew GCC [X] (Apple) Homebrew LLVM Did this affect any on-target builds? If so which were tested? [ ] STM32F407VE board [ ] STM32H753ZI board
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Lines changed: 21722 additions & 6506 deletions

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‎CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,7 @@ add_family(FAMILY stm32h7xx
7575
ARCHITECTURE armv7e-m
7676
PRECISION DOUBLE
7777
NAMESPACE h7xx
78+
DEFINES STM32H7_REV_V
7879
)
7980

8081
add_chip(NAME stm32h753zi

‎boards/nucleo_h753zi/CMakeLists.txt‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ add_board(NAME nucleo_h753zi
2020
MODULES # Have to know the chip and the configuration
2121
stm32-spi-driver
2222
stm32-i2c-driver
23-
stm32-uart-driver
23+
# stm32-uart-driver # no UARTs on the H753ZI, only USART
2424
stm32-usart-driver
2525
jarnax
2626
stm32

‎boards/nucleo_h753zi/source/BoardContext.cpp‎

Lines changed: 60 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -17,21 +17,31 @@ LINKER_SECTION(".dma_buffers") alignas(alignof(std::max_align_t)) static core::A
1717
static core::BitMapHeap<DmaBlockSize, DmaBlockCount> dma_heap_allocator{&dma_memory[0], dma_memory.size()};
1818

1919
/// @brief The Clock configuration for this board.
20+
/// @note HSI @ 64 MHz: M=8 -> 8 MHz VCO input, N=100 -> 800 MHz VCO, P=2 -> 400 MHz sys_ck, Q=4, R=8
2021
ClockConfiguration const default_clock_configuration = {
2122
/* .use_internal = */ true,
2223
/* .use_bypass = */ false,
23-
/* .external_clock_frequency */ high_speed_external_oscillator_frequency,
24-
/* .low_speed_external_oscillator_frequency */ low_speed_external_oscillator_frequency,
25-
/* .ahb_divider = */ 0b0000, // /1
24+
/* .use_csi = */ false,
25+
/* .use_pll_fracn = */ false,
26+
/* .external_clock_frequency = */ high_speed_external_oscillator_frequency,
27+
/* .low_speed_external_oscillator_frequency = */ low_speed_external_oscillator_frequency,
28+
/* .voltage_scaling = */ 0b11, // VOS1 (up to 400 MHz without VOS0 boost)
29+
/* .d1_core_prescaler = */ 0b0000, // /1 (cpu_ck = sys_ck)
30+
/* .ahb_divider = */ 0b0000, // /1 (hclk = sys_ck)
2631
/* .apb1_low_speed_divider = */ 0b101, // /4
2732
/* .apb2_high_speed_divider = */ 0b100, // /2
33+
/* .apb3_divider = */ 0b100, // /2
34+
/* .apb4_divider = */ 0b100, // /2
2835
/* .mcu_clock1_divider = */ 0b111, // /5
2936
/* .mcu_clock2_divider = */ 0b111, // /5
30-
/* .rtc_divider = */ 8,
31-
/* .pll_m = */ 8,
32-
/* .pll_n = */ 336,
33-
/* .pll_p = */ 0b00, // /2
34-
/* .pll_q = */ 7
37+
/* .rtc_divider = */ 8U, // /9 (40 kHz clock for RTC)
38+
/* .pll_source = */ 0U, // HSI
39+
/* .pll_m = */ 8U, // 64 MHz / 8 = 8 MHz
40+
/* .pll_n = */ 100U - 1U, // 8 MHz * 100 = 800 MHz VCO
41+
/* .pll_p = */ 2U - 1U, // 800 MHz / 2 = 400 MHz sys_ck
42+
/* .pll_q = */ 4U - 1U, // 800 MHz / 4 = 200 MHz
43+
/* .pll_r = */ 8U - 1U, // 800 MHz / 8 = 100 MHz
44+
/* .pll_fracn = */ 0
3545
};
3646

3747
} // namespace stm32
@@ -197,7 +207,7 @@ core::Status BoardContext::Initialize(void) {
197207

198208
stm32::h7xx::ResetAndClockControl::AHB1PeripheralClockEnable ahb1_enable;
199209
stm32::h7xx::ResetAndClockControl::AHB2PeripheralClockEnable ahb2_enable;
200-
stm32::h7xx::ResetAndClockControl::APB1PeripheralClockEnable apb1_enable;
210+
stm32::h7xx::ResetAndClockControl::APB1LowClockEnable apb1_enable;
201211
stm32::h7xx::ResetAndClockControl::APB2PeripheralClockEnable apb2_enable;
202212

203213
// Enable the RNG in the AHB2 Periperhals
@@ -214,12 +224,12 @@ core::Status BoardContext::Initialize(void) {
214224
stm32::h7xx::reset_and_clock_control.ahb2_peripheral_reset = reset; // write
215225

216226
// enable the APB1 peripherals in the Reset and Clock Control register
217-
apb1_enable = stm32::h7xx::reset_and_clock_control.apb1_peripheral_clock_enable; // read
218-
apb1_enable.bits.timer2_enable = 1U; // modify
219-
apb1_enable.bits.i2c1_enable = 1U; // modify
220-
apb1_enable.bits.i2c2_enable = 1U; // modify
221-
apb1_enable.bits.usart3_enable = 1U; // modify
222-
stm32::h7xx::reset_and_clock_control.apb1_peripheral_clock_enable = apb1_enable; // write
227+
apb1_enable = stm32::h7xx::reset_and_clock_control.apb1_low_clock_enable; // read
228+
apb1_enable.bits.timer2_enable = 1U; // modify
229+
apb1_enable.bits.i2c1_enable = 1U; // modify
230+
apb1_enable.bits.i2c2_enable = 1U; // modify
231+
apb1_enable.bits.usart3_enable = 1U; // modify
232+
stm32::h7xx::reset_and_clock_control.apb1_low_clock_enable = apb1_enable; // write
223233

224234
// enable the AHB1 peripherals in the Reset and Clock Control register
225235
ahb1_enable = stm32::h7xx::reset_and_clock_control.ahb1_peripheral_clock_enable; // read
@@ -387,43 +397,43 @@ namespace initialize {
387397
void gpio(void) {
388398
using namespace stm32::peripherals;
389399
// Enable GPIO Clocks (for the ones enabled per board)
390-
ResetAndClockControl::AHB1PeripheralClockEnable ahb1_enable;
391-
ResetAndClockControl::AHB1PeripheralReset ahb1_reset;
392-
393-
ahb1_enable = reset_and_clock_control.ahb1_peripheral_clock_enable; // load
394-
ahb1_enable.bits.gpioa_enable = 1U;
395-
ahb1_enable.bits.gpiob_enable = 1U;
396-
ahb1_enable.bits.gpioc_enable = 1U;
397-
ahb1_enable.bits.gpiod_enable = 1U;
398-
ahb1_enable.bits.gpioe_enable = 1U;
399-
ahb1_enable.bits.gpiof_enable = 1U;
400-
ahb1_enable.bits.gpiog_enable = 1U;
401-
ahb1_enable.bits.gpioh_enable = 1U;
402-
ahb1_enable.bits.gpioi_enable = 1U;
403-
reset_and_clock_control.ahb1_peripheral_clock_enable = ahb1_enable; // store
400+
ResetAndClockControl::AHB4ClockEnable ahb4_enable;
401+
ResetAndClockControl::AHB4Reset ahb4_reset;
402+
403+
ahb4_enable = reset_and_clock_control.ahb4_clock_enable; // load
404+
ahb4_enable.bits.gpioa_enable = 1U;
405+
ahb4_enable.bits.gpiob_enable = 1U;
406+
ahb4_enable.bits.gpioc_enable = 1U;
407+
ahb4_enable.bits.gpiod_enable = 1U;
408+
ahb4_enable.bits.gpioe_enable = 1U;
409+
ahb4_enable.bits.gpiof_enable = 1U;
410+
ahb4_enable.bits.gpiog_enable = 1U;
411+
ahb4_enable.bits.gpioh_enable = 1U;
412+
ahb4_enable.bits.gpioi_enable = 1U;
413+
reset_and_clock_control.ahb4_clock_enable = ahb4_enable; // store
404414
// Reset GPIO Ports
405-
ahb1_reset = reset_and_clock_control.ahb1_peripheral_reset; // load
406-
ahb1_reset.bits.gpioa_reset = 1U;
407-
ahb1_reset.bits.gpiob_reset = 1U;
408-
ahb1_reset.bits.gpioc_reset = 1U;
409-
ahb1_reset.bits.gpiod_reset = 1U;
410-
ahb1_reset.bits.gpioe_reset = 1U;
411-
ahb1_reset.bits.gpiof_reset = 1U;
412-
ahb1_reset.bits.gpiog_reset = 1U;
413-
ahb1_reset.bits.gpioh_reset = 1U;
414-
ahb1_reset.bits.gpioi_reset = 1U;
415-
reset_and_clock_control.ahb1_peripheral_reset = ahb1_reset; // store
415+
ahb4_reset = reset_and_clock_control.ahb4_reset; // load
416+
ahb4_reset.bits.gpioa_reset = 1U;
417+
ahb4_reset.bits.gpiob_reset = 1U;
418+
ahb4_reset.bits.gpioc_reset = 1U;
419+
ahb4_reset.bits.gpiod_reset = 1U;
420+
ahb4_reset.bits.gpioe_reset = 1U;
421+
ahb4_reset.bits.gpiof_reset = 1U;
422+
ahb4_reset.bits.gpiog_reset = 1U;
423+
ahb4_reset.bits.gpioh_reset = 1U;
424+
ahb4_reset.bits.gpioi_reset = 1U;
425+
reset_and_clock_control.ahb4_reset = ahb4_reset; // store
416426
// Release GPIO Ports
417-
ahb1_reset.bits.gpioa_reset = 0U;
418-
ahb1_reset.bits.gpiob_reset = 0U;
419-
ahb1_reset.bits.gpioc_reset = 0U;
420-
ahb1_reset.bits.gpiod_reset = 0U;
421-
ahb1_reset.bits.gpioe_reset = 0U;
422-
ahb1_reset.bits.gpiof_reset = 0U;
423-
ahb1_reset.bits.gpiog_reset = 0U;
424-
ahb1_reset.bits.gpioh_reset = 0U;
425-
ahb1_reset.bits.gpioi_reset = 0U;
426-
reset_and_clock_control.ahb1_peripheral_reset = ahb1_reset; // store
427+
ahb4_reset.bits.gpioa_reset = 0U;
428+
ahb4_reset.bits.gpiob_reset = 0U;
429+
ahb4_reset.bits.gpioc_reset = 0U;
430+
ahb4_reset.bits.gpiod_reset = 0U;
431+
ahb4_reset.bits.gpioe_reset = 0U;
432+
ahb4_reset.bits.gpiof_reset = 0U;
433+
ahb4_reset.bits.gpiog_reset = 0U;
434+
ahb4_reset.bits.gpioh_reset = 0U;
435+
ahb4_reset.bits.gpioi_reset = 0U;
436+
reset_and_clock_control.ahb4_reset = ahb4_reset; // store
427437
}
428438

429439
bool drivers(void) {

documentation/pm0253-stm32f7-series-and-stm32h7-series-cortexm7-processor-programming-manual-stmicroelectronics.pdf renamed to documentation/pdfs/pm0253-stm32f7-series-and-stm32h7-series-cortexm7-processor-programming-manual-stmicroelectronics.pdf

File renamed without changes.

‎modules/core/include/core/Split.hpp‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,22 @@ struct Split final {
2222
/// The Storage type of the Split
2323
using StorageType = STORAGE_TYPE;
2424

25+
Split() = default;
26+
Split(StorageType w)
27+
: whole{w} {}
28+
Split(StorageType lower, StorageType upper)
29+
: parts{lower, upper} {}
30+
Split(Split const&) = default;
31+
Split(Split&&) = default;
32+
Split& operator=(Split const& other) {
33+
whole = other.whole;
34+
return *this;
35+
}
36+
Split& operator=(Split&& other) {
37+
whole = other.whole;
38+
return *this;
39+
}
40+
2541
/// The structure holding the lower and upper parts
2642
struct Fields final {
2743
StorageType lower : SplitNumberOfBits; ///< The lower bits below the split

‎modules/core/include/core/Uint.hpp‎

Lines changed: 160 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,160 @@
1+
#ifndef CORE_UINT_HPP
2+
#define CORE_UINT_HPP
3+
4+
#include <cstdint>
5+
#include <type_traits>
6+
7+
namespace core {
8+
9+
template <typename STORAGE_TYPE, size_t NUM_BITS>
10+
struct Uint_ {
11+
static_assert(NUM_BITS > 0, "Must be larger than zero");
12+
static_assert(sizeof(STORAGE_TYPE) * 8U >= NUM_BITS, "Must be less than or equal to storage type number of bits");
13+
static_assert(std::is_unsigned_v<STORAGE_TYPE>, "Storage type must be unsigned");
14+
15+
using StorageType = STORAGE_TYPE;
16+
17+
constexpr Uint_()
18+
: value{0U} {}
19+
constexpr Uint_(StorageType l)
20+
: value{l & ((static_cast<StorageType>(1U) << NUM_BITS) - 1U)} {}
21+
constexpr Uint_(Uint_ const&) = default;
22+
constexpr Uint_(Uint_&&) = default;
23+
constexpr Uint_& operator=(Uint_ const& other) {
24+
value = other.value;
25+
return *this;
26+
}
27+
constexpr Uint_& operator=(Uint_&& other) {
28+
value = other.value;
29+
return *this;
30+
}
31+
explicit constexpr operator StorageType() const { return value; }
32+
constexpr Uint_& operator=(StorageType other) {
33+
value = other & ((static_cast<StorageType>(1U) << NUM_BITS) - 1U); // Mask the value to fit in the number of bits
34+
return *this;
35+
}
36+
StorageType value : NUM_BITS; ///< The value bits
37+
StorageType : sizeof(StorageType) * 8U - NUM_BITS; ///< The upper bits are unnamed and unused
38+
};
39+
40+
template <size_t NUM_BITS>
41+
using uint8_ = Uint_<std::uint8_t, NUM_BITS>;
42+
43+
template <size_t NUM_BITS>
44+
using uint16_ = Uint_<std::uint16_t, NUM_BITS>;
45+
46+
template <size_t NUM_BITS>
47+
using uint32_ = Uint_<std::uint32_t, NUM_BITS>;
48+
49+
template <size_t NUM_BITS>
50+
using uint64_ = Uint_<std::uint64_t, NUM_BITS>;
51+
52+
// === Arithmetic Operators ===
53+
54+
template <typename STORAGE_TYPE, size_t NUM_BITS>
55+
constexpr Uint_<STORAGE_TYPE, NUM_BITS> operator+(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
56+
return Uint_<STORAGE_TYPE, NUM_BITS>{static_cast<STORAGE_TYPE>(lhs) + static_cast<STORAGE_TYPE>(rhs)};
57+
}
58+
59+
template <typename STORAGE_TYPE, size_t NUM_BITS>
60+
constexpr Uint_<STORAGE_TYPE, NUM_BITS> operator-(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
61+
return Uint_<STORAGE_TYPE, NUM_BITS>{static_cast<STORAGE_TYPE>(lhs) - static_cast<STORAGE_TYPE>(rhs)};
62+
}
63+
64+
// === Comparison Operators ===
65+
66+
template <typename STORAGE_TYPE, size_t NUM_BITS>
67+
constexpr bool operator<(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
68+
return lhs.value < rhs.value;
69+
}
70+
71+
template <typename STORAGE_TYPE, size_t NUM_BITS>
72+
constexpr bool operator<(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, STORAGE_TYPE const& rhs) {
73+
return lhs.value < rhs;
74+
}
75+
76+
template <typename STORAGE_TYPE, size_t NUM_BITS>
77+
constexpr bool operator<(STORAGE_TYPE const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
78+
return lhs < rhs.value;
79+
}
80+
81+
template <typename STORAGE_TYPE, size_t NUM_BITS>
82+
constexpr bool operator<=(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
83+
return lhs.value <= rhs.value;
84+
}
85+
86+
template <typename STORAGE_TYPE, size_t NUM_BITS>
87+
constexpr bool operator<=(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, STORAGE_TYPE const& rhs) {
88+
return lhs.value <= rhs;
89+
}
90+
91+
template <typename STORAGE_TYPE, size_t NUM_BITS>
92+
constexpr bool operator<=(STORAGE_TYPE const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
93+
return lhs <= rhs.value;
94+
}
95+
96+
template <typename STORAGE_TYPE, size_t NUM_BITS>
97+
constexpr bool operator>(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
98+
return lhs.value > rhs.value;
99+
}
100+
101+
template <typename STORAGE_TYPE, size_t NUM_BITS>
102+
constexpr bool operator>(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, STORAGE_TYPE const& rhs) {
103+
return lhs.value > rhs;
104+
}
105+
106+
template <typename STORAGE_TYPE, size_t NUM_BITS>
107+
constexpr bool operator>(STORAGE_TYPE const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
108+
return lhs > rhs.value;
109+
}
110+
111+
template <typename STORAGE_TYPE, size_t NUM_BITS>
112+
constexpr bool operator>=(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
113+
return lhs.value >= rhs.value;
114+
}
115+
116+
template <typename STORAGE_TYPE, size_t NUM_BITS>
117+
constexpr bool operator>=(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, STORAGE_TYPE const& rhs) {
118+
return lhs.value >= rhs;
119+
}
120+
121+
template <typename STORAGE_TYPE, size_t NUM_BITS>
122+
constexpr bool operator>=(STORAGE_TYPE const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
123+
return lhs >= rhs.value;
124+
}
125+
126+
// === Equality Operators ===
127+
128+
template <typename STORAGE_TYPE, size_t NUM_BITS>
129+
constexpr bool operator==(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
130+
return lhs.value == rhs.value;
131+
}
132+
133+
template <typename STORAGE_TYPE, size_t NUM_BITS>
134+
constexpr bool operator==(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, STORAGE_TYPE const& rhs) {
135+
return lhs.value == rhs;
136+
}
137+
138+
template <typename STORAGE_TYPE, size_t NUM_BITS>
139+
constexpr bool operator==(STORAGE_TYPE const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
140+
return lhs == rhs.value;
141+
}
142+
143+
template <typename STORAGE_TYPE, size_t NUM_BITS>
144+
constexpr bool operator!=(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
145+
return lhs.value != rhs.value;
146+
}
147+
148+
template <typename STORAGE_TYPE, size_t NUM_BITS>
149+
constexpr bool operator!=(Uint_<STORAGE_TYPE, NUM_BITS> const& lhs, STORAGE_TYPE const& rhs) {
150+
return lhs.value != rhs;
151+
}
152+
153+
template <typename STORAGE_TYPE, size_t NUM_BITS>
154+
constexpr bool operator!=(STORAGE_TYPE const& lhs, Uint_<STORAGE_TYPE, NUM_BITS> const& rhs) {
155+
return lhs != rhs.value;
156+
}
157+
158+
} // namespace core
159+
160+
#endif

‎modules/core/include/core/core.hpp‎

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Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
#include "core/Split.hpp"
1616
#include "core/Stack.hpp"
1717
#include "core/Status.hpp"
18+
#include "core/Uint.hpp"
1819
#include "core/Variant.hpp"
1920
#include "core/std.hpp"
2021
// #include "core/Optional.hpp"

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