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Bump sgd_step_batch16 micro pins again (55 → 100 µs): runner noise
Same benches flaked again at 63/74 µs vs the 55 µs pin — up from 40/38 µs the previous run, i.e. ~2x run-to-run variance on identical code (yscv- model + bench chain still byte-identical to f364661; criterion still reports no change, p > 0.05). The short batch16 steps (~true 20 µs) are noise-dominated on the shared runner while the longer batch64 (208 µs) stays stable. 100 µs = worst observed (74) × the ~1.35 margin used for the batch64 pin. These gates only catch gross regressions here anyway.
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benchmarks/ci-baseline-model-micro.txt

Lines changed: 2 additions & 2 deletions
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model_forward_modes/linear_64x32_batch32.max_upper_us=7
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model_forward_modes/linear_relu_linear_batch32.max_upper_us=16
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model_train_step_modes/sgd_step_batch16.max_upper_us=55
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model_train_step_modes/sgd_step_batch16.max_upper_us=100
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model_train_step_modes/sgd_step_batch64.max_upper_us=280
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model_train_step_modes/sgd_step_batch16_hinge.max_upper_us=55
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model_train_step_modes/sgd_step_batch16_hinge.max_upper_us=100

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