[WIP] Expose escape hatch for manual PDI configuration, misc other changes.

examples/kistler_5074b.rs

@@ -0,0 +1,199 @@
+//! Discover devices connected to the network.
+
+use env_logger::Env;
+use ethercrab::{
+    error::Error, std::{ethercat_now, tx_rx_task}, ConfigureSubdevicePdi, MainDevice, MainDeviceConfig, PdiSegment, PdoDirection, PduStorage, SyncManagerType, Timeouts
+};
+use std::sync::Arc;
+
+/// Maximum number of SubDevices that can be stored. This must be a power of 2 greater than 1.
+const MAX_SUBDEVICES: usize = 128;
+/// Maximum PDU data payload size - set this to the max PDI size or higher.
+const MAX_PDU_DATA: usize = PduStorage::element_size(1100);
+/// Maximum number of EtherCAT frames that can be in flight at any one time.
+const MAX_FRAMES: usize = 16;
+/// Maximum total PDI length.
+const PDI_LEN: usize = 128;
+
+static PDU_STORAGE: PduStorage<MAX_FRAMES, MAX_PDU_DATA> = PduStorage::new();
+
+fn main() {
+    env_logger::Builder::from_env(Env::default().default_filter_or("info")).init();
+
+    let interface = std::env::args()
+        .nth(1)
+        .expect("Provide network interface as first argument.");
+
+    log::info!("Discovering EtherCAT devices on {}...", interface);
+
+    let (tx, rx, pdu_loop) = PDU_STORAGE.try_split().expect("can only split once");
+
+    let maindevice = Arc::new(MainDevice::new(
+        pdu_loop,
+        Timeouts::default(),
+        MainDeviceConfig {
+            dc_static_sync_iterations: 0,
+            ..MainDeviceConfig::default()
+        },
+    ));
+
+    smol::block_on(async {
+        smol::spawn(tx_rx_task(&interface, tx, rx).expect("spawn TX/RX task")).detach();
+
+        let mut group = maindevice
+            .init_single_group::<MAX_SUBDEVICES, PDI_LEN>(ethercat_now)
+            .await
+            .expect("Init");
+
+        log::info!("Discovered {} SubDevices", group.len());
+
+        for subdevice in group.iter(&maindevice) {
+            log::info!(
+                "--> SubDevice {:#06x} {} {}",
+                subdevice.configured_address(),
+                subdevice.name(),
+                subdevice.identity()
+            );
+        }
+
+        let group = group.into_pre_op_pdi_with_callback(&maindevice, ConfigureKistler5074B).await.expect("Pre-op PDI");
+
+        group.into_op(&maindevice).await.expect("Op");
+    });
+
+    log::info!("Done.");
+}
+
+struct ConfigureKistler5074B;
+
+impl ConfigureSubdevicePdi for ConfigureKistler5074B {
+    type Error = Error;
+    async fn configure<'a, S>(
+            &mut self,
+            subdevice: &mut ethercrab::SubDeviceRef<'a, S>,
+            sync_managers: &[ethercrab::SyncManager],
+            _fmmu_usage: &[ethercrab::FmmuUsage],
+            direction: ethercrab::PdoDirection,
+            global_offset: &mut ethercrab::PdiOffset,
+        ) -> Result<ethercrab::PdiSegment, Self::Error>
+        where
+            S: std::ops::DerefMut<Target = ethercrab::SubDevice> {
+
+        let start_offset = *global_offset;
+
+        // XXX: The charge amp isn't spec-compliant, PDO mapping SDOs (e.g. 0x1600 and
+        // 0x1A00) are not readable which breaks Ethercrab's default PDI setup.
+        pub const SM_ASSIGNMENT_BASE_ADDRESS: u16 = 0x1C10;
+        let (len_bytes, sm_idx, fmmu_idx) = match direction {
+            PdoDirection::MasterRead => {
+                const LEN_BYTES: u16 = 4 + (4 * 4 * 4);
+                const SM_IDX: u8 = 3;
+                const SM_ASSIGNMENT: u16 = SM_ASSIGNMENT_BASE_ADDRESS + (SM_IDX as u16);
+                const FMMU_IDX: usize = 1;
+
+                // PDO mapping
+                // All PDOs are fixed, nothing to do.
+
+                // PDO assignments
+                // XXX: You have to play this little song and dance with the CoE array's length.
+                subdevice
+                    .sdo_write::<u8>(SM_ASSIGNMENT, 0, 0)
+                    .await
+                    .expect("zeroing pdo assignment count");
+                // Status ChX - BYTE
+                // Scaled Value ChX - REAL
+                for channel_idx in 0..4u8 {
+                    let sdo_subindex = 0x1A00_u16 + (u16::from(channel_idx) << 4);
+                    subdevice
+                        .sdo_write(SM_ASSIGNMENT, (channel_idx * 5) + 1, sdo_subindex)
+                        .await
+                        .expect("setting CH1 status PDO assignment");
+                    subdevice
+                        .sdo_write(SM_ASSIGNMENT, (channel_idx * 5) + 2, sdo_subindex + 1_u16)
+                        .await
+                        .expect("setting CH1 value PDO assignment");
+                    subdevice
+                        .sdo_write(SM_ASSIGNMENT, (channel_idx * 5) + 3, sdo_subindex + 2_u16)
+                        .await
+                        .expect("setting CH1 peak min PDO assignment");
+                    subdevice
+                        .sdo_write(SM_ASSIGNMENT, (channel_idx * 5) + 4, sdo_subindex + 3_u16)
+                        .await
+                        .expect("setting CH1 peak max PDO assignment");
+                    subdevice
+                        .sdo_write(SM_ASSIGNMENT, (channel_idx * 5) + 5, sdo_subindex + 4_u16)
+                        .await
+                        .expect("setting CH1 integral PDO assignment");
+                }
+                // Donzo
+                subdevice
+                    .sdo_write::<u8>(SM_ASSIGNMENT, 0, 4 * 5)
+                    .await
+                    .expect("setting PDO assignment count");
+
+                (LEN_BYTES, SM_IDX, FMMU_IDX)
+            }
+            PdoDirection::MasterWrite => {
+                const LEN_BYTES: u16 = 4;
+                const SM_IDX: u8 = 2;
+                const SM_ASSIGNMENT: u16 = SM_ASSIGNMENT_BASE_ADDRESS + (SM_IDX as u16);
+                const FMMU_IDX: usize = 0;
+
+                // PDO mapping: All PDOs are fixed, nothing to do.
+
+                // PDO assignments
+                // XXX: You have to play this little song and dance with the CoE array's length.
+                subdevice
+                    .sdo_write(SM_ASSIGNMENT, 0, 0_u8)
+                    .await
+                    .expect("zeroing pdo assignment count");
+                // Control Ch - BYTE
+                // XXX: Even though these are required PDO assignments, you do have to reassign
+                // them. This may have been what was breaking EtherCrab's EEPROM based setup.
+                subdevice
+                    .sdo_write(SM_ASSIGNMENT, 1, 0x1600_u16)
+                    .await
+                    .expect("setting CH1 control PDO assignment");
+                subdevice
+                    .sdo_write(SM_ASSIGNMENT, 2, 0x1610_u16)
+                    .await
+                    .expect("setting CH2 control PDO assignment");
+                subdevice
+                    .sdo_write(SM_ASSIGNMENT, 3, 0x1620_u16)
+                    .await
+                    .expect("setting CH3 control PDO assignment");
+                subdevice
+                    .sdo_write(SM_ASSIGNMENT, 4, 0x1630_u16)
+                    .await
+                    .expect("setting CH4 control PDO assignment");
+                // Donzo
+                subdevice
+                    .sdo_write(SM_ASSIGNMENT, 0, 4_u8)
+                    .await
+                    .expect("setting PDO assignment count");
+
+                (LEN_BYTES, SM_IDX, FMMU_IDX)
+            }
+        };
+
+        let len_bits = 8 * len_bytes;
+
+        let sm_config = subdevice
+            .write_sm_config(sm_idx, &sync_managers[usize::from(sm_idx)], len_bytes)
+            .await
+            .expect("configuring sync manager");
+        let desired_sm_type = match direction {
+            PdoDirection::MasterRead => SyncManagerType::ProcessDataRead,
+            PdoDirection::MasterWrite => SyncManagerType::ProcessDataWrite,
+        };
+        subdevice
+            .write_fmmu_config(len_bits, fmmu_idx, global_offset, desired_sm_type, &sm_config)
+            .await
+            .expect("configuring fmmu");
+
+        Ok(PdiSegment {
+            bit_len: usize::from(len_bits),
+            bytes:   start_offset.up_to(*global_offset),
+        })
+    }
+}

rust-toolchain.toml

@@ -1,4 +1,4 @@
 [toolchain]
-channel = "1.77"
+channel = "1.79"
 profile = "default"
 targets = ["x86_64-unknown-linux-gnu"]

src/eeprom/types.rs

@@ -262,10 +262,14 @@ impl From<PdoType> for CategoryType {
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 #[repr(u8)]
 pub enum FmmuUsage {
+    /// TODO
     #[wire(alternatives = [0xff])]
     Unused = 0x00,
+    /// TODO
     Outputs = 0x01,
+    /// TODO
     Inputs = 0x02,
+    /// TODO
     SyncManagerStatus = 0x03,
 }
 
@@ -435,20 +439,26 @@ impl EtherCrabWireRead for CoeDetails {
     }
 }
 
+/// TODO
 #[derive(Copy, Clone, PartialEq, Eq, ethercrab_wire::EtherCrabWireRead)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 #[wire(bytes = 8)]
 pub struct SyncManager {
+    /// TODO
     #[wire(bytes = 2)]
-    pub(crate) start_addr: u16,
+    pub start_addr: u16,
+    /// TODO
     #[wire(bytes = 2)]
-    pub(crate) length: u16,
+    pub length: u16,
+    /// TODO
     #[wire(bytes = 1, post_skip_bytes = 1)]
-    pub(crate) control: sync_manager_channel::Control,
+    pub control: sync_manager_channel::Control,
+    /// TODO
     #[wire(bytes = 1)]
-    pub(crate) enable: SyncManagerEnable,
+    pub enable: SyncManagerEnable,
+    /// TODO
     #[wire(bytes = 1)]
-    pub(crate) usage_type: SyncManagerType,
+    pub usage_type: SyncManagerType,
 }
 
 impl core::fmt::Debug for SyncManager {
@@ -464,6 +474,7 @@ impl core::fmt::Debug for SyncManager {
 }
 
 bitflags::bitflags! {
+    /// TODO
     #[derive(Debug, Copy, Clone, PartialEq, Eq)]
     pub struct SyncManagerEnable: u8 {
         /// Bit 0: enable.
@@ -502,6 +513,7 @@ impl defmt::Format for SyncManagerEnable {
     }
 }
 
+/// TODO
 #[derive(Default, Debug, Copy, Clone, PartialEq, Eq, ethercrab_wire::EtherCrabWireRead)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 #[repr(u8)]

src/lib.rs

@@ -198,18 +198,22 @@ pub mod std;
 pub use al_status_code::AlStatusCode;
 pub use coe::SubIndex;
 pub use command::{Command, Reads, WrappedRead, WrappedWrite, Writes};
+pub use eeprom::types::{SyncManager, SyncManagerEnable, SyncManagerType, FmmuUsage};
 pub use ethercrab_wire::{
     EtherCrabWireRead, EtherCrabWireReadSized, EtherCrabWireReadWrite, EtherCrabWireSized,
     EtherCrabWireWrite, EtherCrabWireWriteSized,
 };
 use ethernet::EthernetAddress;
 pub use maindevice::MainDevice;
 pub use maindevice_config::{MainDeviceConfig, RetryBehaviour};
+pub use pdi::{PdiOffset, PdiSegment};
 pub use pdu_loop::{PduLoop, PduRx, PduStorage, PduTx, SendableFrame};
 pub use register::{DcSupport, RegisterAddress};
 pub use subdevice::{DcSync, SubDevice, SubDeviceIdentity, SubDevicePdi, SubDeviceRef};
+pub use subdevice::configuration::{ConfigureSubdevicePdi, ConfigureSubdevicePdiDefault, ConfigureSubdevicePdiBasedOnCoe, ConfigureSubdevicePdiBasedOnEeprom, PdoDirection, ConfigureSubdevicePdiError};
 pub use subdevice_group::{GroupId, GroupSubDeviceIterator, SubDeviceGroup, SubDeviceGroupHandle};
 pub use subdevice_state::SubDeviceState;
+pub use sync_manager_channel::Control as SyncManagerControl;
 pub use timer_factory::Timeouts;
 
 const LEN_MASK: u16 = 0b0000_0111_1111_1111;

src/maindevice.rs

@@ -93,10 +93,14 @@ impl<'sto> MainDevice<'sto> {
             .await?;
 
         // Clear FMMUs. FMMU memory section is 0xff (255) bytes long - see ETG1000.4 Table 57
-        self.blank_memory(RegisterAddress::Fmmu0, 0xff).await?;
+        for fmmu_idx in 0..16 {
+            self.blank_memory(RegisterAddress::fmmu(fmmu_idx), 0x10).await?;
+        }
 
         // Clear SMs. SM memory section is 0x7f bytes long - see ETG1000.4 Table 59
-        self.blank_memory(RegisterAddress::Sm0, 0x7f).await?;
+        for sm_idx in 0..16 {
+            self.blank_memory(RegisterAddress::sync_manager(sm_idx), 0x8).await?;
+        }
 
         // Set DC control back to EtherCAT
         self.blank_memory(

src/pdi.rs

@@ -7,6 +7,7 @@ use core::ops::Range;
 #[derive(Default, Debug, Copy, Clone, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct PdiOffset {
+    /// TODO
     pub start_address: u32,
     // // Unused, but will become useful if we support bit-packed PDI mappings in the future.
     // start_bit: u8,
@@ -20,6 +21,7 @@ impl PdiOffset {
         self.increment_inner(0, inc_bytes)
     }
 
+    /// TODO
     pub fn increment(self, bytes: u16) -> Self {
         self.increment_inner(0, bytes)
     }
@@ -68,18 +70,23 @@ impl PdiOffset {
     // }
 }
 
+/// TODO
 #[derive(Default, Debug, Clone, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct PdiSegment {
+    /// TODO
     pub bytes: Range<usize>,
+    /// TODO
     pub bit_len: usize,
 }
 
 impl PdiSegment {
+    /// TODO
     pub fn len(&self) -> usize {
         self.bytes.len()
     }
 
+    /// TODO
     pub fn is_empty(&self) -> bool {
         self.len() == 0
     }