Commit 0634875
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clk: rockchip: Fix fractional PLL calculation for RK3588
RK3588/RK3576 have several fractional PLLs using a delta-sigma adjustment
factor (k) for the fractional component of the PLL output frequency.
According to the TRM, the k is a two's complement 16-bit value, not an
unsiged integer (see for example the TRM description of CRU_GPLL_CON2,
and also a related U-boot fix at [1]).
Adjust the code to properly handle negative k values.
While at it, also fix the denominator to use the correct value of 65536,
not 65535 for the full range of PLL ratios.
Cc: stable@vger.kernel.org
Fixes: 8f65944 ("clk: rockchip: add pll type for RK3588")
Link: https://lore.kernel.org/all/20231012101828.27195-1-zhangqing@rock-chips.com/ [1]
Signed-off-by: Alexey Charkov <alchark@flipper.net>1 parent ad75bcd commit 0634875
2 files changed
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