Skip to content

dgb(g2): AutoRatchet rig-free SIM KAT — arms staged-migration C2/C3/C4 - #548

Merged
frstrtr merged 2 commits into
masterfrom
dgb/g2-autoratchet-sim-kat
Jul 2, 2026
Merged

dgb(g2): AutoRatchet rig-free SIM KAT — arms staged-migration C2/C3/C4#548
frstrtr merged 2 commits into
masterfrom
dgb/g2-autoratchet-sim-kat

Conversation

@frstrtr

@frstrtr frstrtr commented Jun 26, 2026

Copy link
Copy Markdown
Owner

FENCED, additive rig-free SIM KAT — the C++ counterpart of the G2 staged-migration harness --sim-votes path. Proves the AutoRatchet staged-gate LOGIC over hand-derived oracle votes WITHOUT a Scrypt rig or a live digibyted parent (the shell harness is binary-gated; this unblocks the G2 gate logic proof now).

Checks (7/7 PASS locally on build_dgb):

Pinned to DGBs OWN oracle frstrtr/p2pool-dgb-scrypt @22761e7 (terminal v35 -> v36), NOT the ltc v35 transition: the VOTING output is base_version=35 (ctor param). C3 replicates the live inline 60%-by-WORK tail guard verbatim — the same non-circular pin as dgb_auto_ratchet_tail_guard_test. No consensus surface mutated; touches src/impl/dgb/ test tree + build.yml allowlist only (#143 NOT_BUILT trap avoided).

Mirror of the BTC sim KAT (#btc/g2-autoratchet-sim-kat). NO self-merge.

@frstrtr
frstrtr force-pushed the dgb/g2-autoratchet-sim-kat branch 2 times, most recently from ef22360 to 8bff1de Compare July 1, 2026 17:21
frstrtr added 2 commits July 2, 2026 00:57
Rig-free C++ counterpart of the G2 staged-migration harness --sim-votes
path: proves the AutoRatchet staged-gate LOGIC over hand-derived oracle
votes WITHOUT a Scrypt rig or a live digibyted parent.

  C2  VOTING mints the DGB baseline (v35, SUCCESSOR=None) while voting V36
  C3  #288 accept gate is 60%-by-WORK; a 95%-by-COUNT activation cannot
      outrun it (mint-cannot-outrun-accept); staged tally monotone
  C4  CONFIRMED state persists across restart; fresh node mints baseline

Pinned to DGB own oracle frstrtr/p2pool-dgb-scrypt @22761e7 (terminal v35
-> v36), NOT the ltc v35 transition: VOTING output = base_version=35 ctor
param. C3 replicates the live inline 60%-by-WORK tail guard verbatim, the
same non-circular pin as dgb_auto_ratchet_tail_guard_test. No consensus
surface mutated; src/impl/dgb/ test-tree only + build.yml allowlist. 7/7.
Extends the rig-free AutoRatchet SIM KAT (arming the G2 staged-migration
harness) with the C5 row: the V36 SCRYPT-ONLY posture and its load-bearing
intersection with the #288 work-weighted accept gate.

  C5  posture disposition vs coin/dgb_block_algo.hpp SSOT: Scrypt header ->
      VALIDATE_SCRYPT (the only validated PoW lane); SHA256d/Skein/Qubit/Odo
      + legacy Groestl -> ACCEPT_BY_CONTINUITY (work-neutral); unknown algo
      nibbles -> REJECT.
  C5/work-neutral  accept-by-continuity blocks credit ZERO work, so a >=95%-
      by-headcount V36 majority carried by non-Scrypt algos canNOT outrun the
      60%-by-work ratchet accept gate -- the multi-algo analogue of
      C3_MintCannotOutrunAccept. Only Scrypt votes ever move the gate.

Pins the consensus SSOT (dgb_block_algo.hpp, itself guarded vs upstream
DigiByte Core by algo_select_test); no consensus surface mutated. FENCED to
src/impl/dgb/ test-tree. 9/9 (was 7/7).
@frstrtr
frstrtr force-pushed the dgb/g2-autoratchet-sim-kat branch from 8bff1de to 793668f Compare July 2, 2026 01:01
@frstrtr
frstrtr merged commit 0f4422f into master Jul 2, 2026
33 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant