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Merge pull request #39 from mgielda/patch-1
Fix UCIS WG link
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examples/verilator/README.md

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- [Verilator Manual](https://verilator.org/guide/latest/)
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- [Verilator Coverage](https://verilator.org/guide/latest/exe_verilator_coverage.html)
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- [PyUCIS Documentation](https://github.com/fvutils/pyucis)
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- [UCIS Standard](https://www.accellera.org/activities/committees/ucis)
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- [UCIS Standard](https://www.accellera.org/downloads/standards/ucis)
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- [SystemVerilog Assertions](https://standards.ieee.org/standard/1800-2017.html)
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## Related Examples

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