Various fixes for HIP cluster. REVIEW IF THESE ARE REALLY NEEDED.

Author: fweig

GPU/GPUTracking/Global/GPUChainTrackingClusterizer.cxx

@@ -1209,17 +1209,9 @@ int32_t GPUChainTracking::RunTPCClusterizer(bool synchronizeOutput)
           runKernel<GPUMemClean16>({GetGridAutoStep(lane, RecoStep::TPCClusterFinding), krnlRunRangeNone, {nullptr, waitEvent}}, clustererShadow.mPclusterInRow, GPUCA_ROW_COUNT * sizeof(*clustererShadow.mPclusterInRow));
         }
 
-        // TODO: Move this right after CheckPadBaseline once tail zeroing is moved into this kernel.
-        // The mPnHIPTails counter zeroing will then also need to be adjusted accordingly.
-        if (rec()->GetParam().rec.tpc.hipTailFilter) {
-          runKernel<GPUTPCCFHIPClusterizer>({GetGridBlk(1, lane), {iSector}});
-        }
-
-        if (clusterer.mPmemory->counters.nClusters == 0) {
-          return;
-        }
-
-        if (GetProcessingSettings().nn.applyNNclusterizer) {
+        const auto nRegularClusters = clusterer.mPmemory->counters.nClusters;
+        if (nRegularClusters != 0) {
+          if (GetProcessingSettings().nn.applyNNclusterizer) {
 #ifdef GPUCA_HAS_ONNX
           GPUTPCNNClusterizer& clustererNN = processors()->tpcNNClusterer[lane];
           GPUTPCNNClusterizer& clustererNNShadow = doGPU ? processorsShadow()->tpcNNClusterer[lane] : clustererNN;
@@ -1359,12 +1351,27 @@ int32_t GPUChainTracking::RunTPCClusterizer(bool synchronizeOutput)
           runKernel<GPUTPCCFClusterizer>({GetGrid(clusterer.mPmemory->counters.nClusters, lane), {iSector}}, 0);
         }
 
-        if (doGPU && propagateMCLabels) {
-          TransferMemoryResourceLinkToHost(RecoStep::TPCClusterFinding, clusterer.mScratchId, lane);
-          if (doGPU) {
+          if (doGPU && propagateMCLabels) {
+            TransferMemoryResourceLinkToHost(RecoStep::TPCClusterFinding, clusterer.mScratchId, lane);
+            if (doGPU) {
+              SynchronizeStream(lane);
+            }
+            runKernel<GPUTPCCFClusterizer>({GetGrid(clusterer.mPmemory->counters.nClusters, lane, GPUReconstruction::krnlDeviceType::CPU), {iSector}}, 1); // Computes MC labels
+          }
+        }
+
+        // TODO: Move this right after CheckPadBaseline once tail zeroing is moved into this kernel.
+        // The mPnHIPTails counter zeroing will then also need to be adjusted accordingly.
+        if (rec()->GetParam().rec.tpc.hipTailFilter) {
+          runKernel<GPUTPCCFHIPClusterizer>({GetGridBlk(1, lane), {iSector}});
+          if (doGPU && (nRegularClusters == 0 || GetProcessingSettings().debugLevel >= 3)) {
+            TransferMemoryResourceLinkToHost(RecoStep::TPCClusterFinding, clusterer.mMemoryId, lane);
             SynchronizeStream(lane);
           }
-          runKernel<GPUTPCCFClusterizer>({GetGrid(clusterer.mPmemory->counters.nClusters, lane, GPUReconstruction::krnlDeviceType::CPU), {iSector}}, 1); // Computes MC labels
+        }
+
+        if (clusterer.mPmemory->counters.nClusters == 0) {
+          return;
         }
 
         if (GetProcessingSettings().debugLevel >= 3) {

GPU/GPUTracking/TPCClusterFinder/GPUTPCCFCheckPadBaseline.cxx

@@ -444,6 +444,7 @@ GPUd() void GPUTPCCFHIPClusterizer::Thread<0>(int32_t nBlocks, int32_t nThreads,
     merged[i] = false;
   }
 
+  tpccf::SizeT nCreatedClusters = 0;
   for (uint32_t i = 0; i < n; i++) {
     if (merged[i]) {
       continue;
@@ -511,6 +512,9 @@ GPUd() void GPUTPCCFHIPClusterizer::Thread<0>(int32_t nBlocks, int32_t nThreads,
     uint32_t index = CAMath::AtomicAdd(&clusterer.mPclusterInRow[row], 1u);
     if (index < clusterer.mNMaxClusterPerRow) {
       clusterer.mPclusterByRow[clusterer.mNMaxClusterPerRow * row + index] = cn;
+      nCreatedClusters++;
     }
   }
+
+  clusterer.mPmemory->counters.nClusters += nCreatedClusters;
 }

GPU/GPUTracking/TPCClusterFinder/GPUTPCCFCheckPadBaseline.h

@@ -151,7 +151,7 @@ class GPUTPCCFHIPClusterizer : public GPUKernelTemplate
 {
  public:
   enum {
-    MaxHIPTails = 256,
+    MaxHIPTails = 1 << 15,
   };
 
   struct GPUSharedMemory {