feat(igla): Wave Loop 796 — module-scope [411][2]^6 Pt non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes

Closes #1521

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

Author: Dmitrii Vasilev

.claude/plans/wave-loop-797.md

@@ -0,0 +1,80 @@
+# Wave Loop 797 Plan — Variant A (recommended)
+
+**Date:** 2026-07-24
+**Anchor:** φ² + φ⁻² = 3 | TRINITY
+**Branch:** `wave-loop-797` (to be created from `wave-loop-796` HEAD because earlier wave PRs remain open)
+**Issue:** TBD (next available GitHub issue after W796 PR is opened)
+**Cooperation variant:** A
+
+## Goal
+
+Continue the module-scope packed array-of-struct ladder with the recommended Variant A shape: module-scope `[413][2]^6 Pt` initialized from a function call and exercised with indexed signed field writes, then read back with `assert_eq` in a `bench` block.
+
+## Acceptance criteria
+
+1. `specs/scratch/w797_bench_module_413x2p6_aos_var_call_write.t27` is generated and parses.
+2. The witness is Icarus-lowerable and simulates correctly (17 cycles, PASSED).
+3. The cocotb reference model matches the t27 semantics.
+4. `t27c seal --save` succeeds and `FROZEN_HASH` stays unchanged.
+5. All cargo suites remain green.
+6. Integration test `accepts_w797_bench_module_413x2p6_aos_var_call_write` is added to `bootstrap/tests/icarus_lowerable.rs`.
+7. Closeout report `docs/reports/FPGA_LOOP_CLOSEOUT_W797_2026-07-24.md` is written with weak-point audit, literature scan, and validation matrix.
+8. Next-wave plan `.claude/plans/wave-loop-798.md` with three cooperation variants is created.
+9. Learning is saved to `.trinity/experience.md`, `.claude/skills/t27-wave-loop.md`, persistent memory, and `.trinity/current-issue.md`.
+
+## Technical notes
+
+- Shape: `[413][2]^6 Pt` where `Pt = pub struct Pt { x : i16, y : i16 }`.
+- Total elements: `413 x 64 = 26,432`.
+- Packed vector width: `26,432 x 32 = 845,824` bits (~0.807 MiBit).
+- `MID_IDX = 206`; frame-condition element `[206][1][0][0][0][0][0]` is element number `206*64 + 32 = 13,216`.
+- Generator script `scripts/gen_w797.py` should be copied from `scripts/gen_w796.py`, update `OUTER = 413` and `MID_IDX = 206`, and fix the destination path and hardcoded module prefix in the f-string header.
+- Use `assert_eq` on changed elements (`assert_ne` is not emitted by the Icarus simulation path).
+- Include `make_grid(32768)` period-identity check because `32768 == 0 (mod 32768)`.
+- Zero compiler / reference-model / FROZEN_HASH changes expected for the witness.
+
+## Decomposition
+
+### Phase A — Branch setup (5 min)
+1. Create `wave-loop-797` from `wave-loop-796` HEAD because earlier wave PRs remain open.
+2. Open next GitHub issue when ready.
+
+### Phase B — Spec + generator (15 min)
+3. Copy `scripts/gen_w796.py` to `scripts/gen_w797.py`.
+4. Update `OUTER = 413`, `MID_IDX = 206`, fix destination path and module prefix.
+5. Run generator to produce `specs/scratch/w797_bench_module_413x2p6_aos_var_call_write.t27`.
+6. Verify module name and destination path have no stale `w796` / `411` references.
+
+### Phase C — Test + validation (45 min)
+7. Add integration test `accepts_w797_bench_module_413x2p6_aos_var_call_write` to `bootstrap/tests/icarus_lowerable.rs`.
+8. `cargo build --release -p t27c`.
+9. `t27c parse`, `icarus-lowerable`, `icarus-simulate` (expected 17 cycles), `icarus-cocotb` on the W797 witness.
+10. `t27c seal --save` the witness; confirm `FROZEN_HASH` unchanged.
+11. `cargo test -p t27c --bin t27c`, `cargo test -p tri`, `cargo test -p t27c --test icarus_lowerable`, `cargo test -p t27c --test verilog_const_array`.
+12. `cargo clippy -p t27c`.
+
+### Phase D — Closeout + cooperation variants (30 min)
+13. Write `docs/reports/FPGA_LOOP_CLOSEOUT_W797_2026-07-24.md` with audit, literature, validation, and three W798 cooperation variants.
+14. Update `docs/NOW.md` and `.trinity/current-issue.md`.
+
+### Phase E — Save skills + memory (15 min)
+15. Append W797 worked example to `.claude/skills/t27-wave-loop.md`.
+16. Update `.trinity/experience.md`.
+17. Save memory file `wave-loop-797.md` and pointer in `MEMORY.md`.
+
+## Cooperation variants for Wave Loop 798
+
+- **Variant A (recommended):** continue odd outer-dimension ladder with `[415][2]^6 Pt` (~0.810 MiBit, 26,560 elements, 849,920-bit packed vector). Zero compiler changes expected.
+- **Variant B:** keep `[413][2]^6 Pt` width but move the packed var to bench/function scope to exercise function-local non-power-of-two packed arrays.
+- **Variant C:** keep `[413][2]^6 Pt` width and add `if`-guarded indexed signed field writes to exercise control-flow + packed-vector writes.
+
+## Exit criteria
+
+- W797 witness parses, lowers, simulates, cocotb-matches, and seals.
+- All cargo suites green.
+- Closeout report written.
+- `.trinity/experience.md` updated.
+- Skills and memory saved.
+- Commit with `Closes #N`, push `wave-loop-797`, open PR.
+
+*φ² + φ⁻² = 3 | TRINITY*

.claude/skills/t27-wave-loop.md

@@ -1456,6 +1456,47 @@ grepping for stale wave numbers and outer dimensions after each copy, keep the
 `make_grid(32768)` period-identity check, and use `assert_eq` on changed elements
 because `assert_ne` is not emitted by the Icarus simulation path.
 
+## Worked example — Wave Loop 796
+
+Wave Loop 796 continued the module-scope packed-array-of-struct ladder with no
+compiler changes, branching from `wave-loop-795` HEAD because earlier wave PRs
+remained open awaiting review:
+
+- Generated `scripts/gen_w796.py` from `scripts/gen_w795.py` with `OUTER = 411`
+  and `MID_IDX = 205`.
+- Fixed both the generator destination path and the module header f-string from
+  stale `w795` / `409` references to `w796_bench_module_411x2p6_aos_var_call_write`
+  before regenerating.
+- Produced `specs/scratch/w796_bench_module_411x2p6_aos_var_call_write.t27`
+  (26,304 elements, 841,728-bit packed vector, ~0.803 MiBit).
+- Added integration test `accepts_w796_bench_module_411x2p6_aos_var_call_write`
+  after the existing W795 tests in `bootstrap/tests/icarus_lowerable.rs`.
+- Ran `t27c parse`, `icarus-lowerable`, `icarus-simulate` (17 cycles, PASSED),
+  `icarus-cocotb` (reference-model OK), and `t27c seal --save`.
+- No changes to `bootstrap/src/compiler.rs`, `bootstrap/stage0/FROZEN_HASH`, or
+  `scripts/cocotb_ref_model.py` for the witness itself.
+- Validation: `cargo build --release -p t27c` green,
+  `cargo clippy -p t27c` green (780 warnings, 0 errors),
+  `cargo test -p t27c --bin t27c` 1494/0/2, `cargo test -p tri` 78/0,
+  `cargo test -p flash-spi` 2/0,
+  `cargo test -p t27c --test bitnet_pipeline` 20/0,
+  `cargo test -p t27c --test bitnet_top` 17/0,
+  `cargo test -p t27c --test icarus_lowerable` 256/0,
+  `cargo test -p t27c --test verilog_const_array` 2/0.
+- Refreshed weak-point audit and 2025–2026 ternary/MVL literature scan.
+- Wrote `docs/reports/FPGA_LOOP_CLOSEOUT_W796_2026-07-24.md` and
+  `.claude/plans/wave-loop-797.md` with three cooperation variants.
+
+Key learning: the mechanical ladder is now 24 waves deep (W774–W796) with zero
+compiler changes, confirming the packed-vector AoS lowering is robust up to at
+least `[411][2]^6 Pt` (26,304 elements, ~0.803 MiBit). The generator copy hazard
+continues to be the only manual failure mode, and it now spans two distinct text
+locations (destination path + module header f-string). A single parameterized
+wave-prefix variable in the generator template would eliminate both. Continue
+grepping for stale wave numbers and outer dimensions after each copy, keep the
+`make_grid(32768)` period-identity check, and use `assert_eq` on changed elements
+because `assert_ne` is not emitted by the Icarus simulation path.
+
 ---
 
 *φ² + φ⁻² = 3 | TRINITY*

.trinity/current-issue.md

@@ -1,50 +1,50 @@
-# Wave Loop 795 — Issue #1519
+# Wave Loop 796 — Issue #1521
 
-**Branch:** `wave-loop-795`
-**Parent branch:** `wave-loop-794` HEAD (`0d7475997`)
+**Branch:** `wave-loop-796`
+**Parent branch:** `wave-loop-795` HEAD (`58d5a870a`)
 **Date:** 2026-07-24
-**Issue:** #1519
-**PR:** #1520
+**Issue:** #1521
+**PR:** #1522
 **Cooperation variant:** A (recommended)
 **Status:** closeout complete
 
 ## Goal
 
-Close Wave Loop 795 by validating a module-scope `[409][2]^6 Pt` packed
+Close Wave Loop 796 by validating a module-scope `[411][2]^6 Pt` packed
 array-of-struct variable initialized from a function call, with indexed signed
 field writes and `assert_eq` read-back in a `bench` block.
 
-Earlier wave PRs remain open awaiting review, so W795 was branched from
-`wave-loop-794` HEAD to avoid blocking the sequence.
+Earlier wave PRs remain open awaiting review, so W796 was branched from
+`wave-loop-795` HEAD to avoid blocking the sequence.
 
 ## Acceptance criteria
 
-1. [x] `specs/scratch/w795_bench_module_409x2p6_aos_var_call_write.t27` is generated and parses.
+1. [x] `specs/scratch/w796_bench_module_411x2p6_aos_var_call_write.t27` is generated and parses.
 2. [x] The witness is Icarus-lowerable and simulates correctly (17 cycles, PASSED).
 3. [x] The cocotb reference model matches the t27 semantics.
 4. [x] `t27c seal --save` succeeds and FROZEN_HASH remains unchanged.
 5. [x] All cargo suites remain green, including `cargo clippy -p t27c`.
-6. [x] Integration test `accepts_w795_bench_module_409x2p6_aos_var_call_write` is added.
-7. [x] Closeout report `docs/reports/FPGA_LOOP_CLOSEOUT_W795_2026-07-24.md` is written.
+6. [x] Integration test `accepts_w796_bench_module_411x2p6_aos_var_call_write` is added.
+7. [x] Closeout report `docs/reports/FPGA_LOOP_CLOSEOUT_W796_2026-07-24.md` is written.
 8. [x] Learning is saved to `.trinity/experience.md`, memory, `.claude/skills/t27-wave-loop.md`, and `.trinity/current-issue.md`.
-9. [x] `.claude/plans/wave-loop-796.md` with three cooperation variants is created.
-10. [x] Commit with `Closes #1519`, push `wave-loop-795`, open PR #1520.
+9. [x] `.claude/plans/wave-loop-797.md` with three cooperation variants is created.
+10. [x] Commit with `Closes #1521`, push `wave-loop-796`, open PR #1522.
 
 ## Technical notes
 
-- Shape: `[409][2]^6 Pt` where `Pt = pub struct Pt { x : i16, y : i16 }`.
-- Total elements: `409 x 64 = 26,176`.
-- Packed vector width: `26,176 x 32 = 837,632` bits (~0.799 MiBit).
-- `MID_IDX = 204`; frame-condition element `[204][1][0][0][0][0][0]` is element
-  number `204*64 + 32 = 13,088`.
-- Generator script: `scripts/gen_w795.py` (copy from `scripts/gen_w794.py`, set
-  `OUTER = 409` and `MID_IDX = 204`, fix destination path and module prefix).
+- Shape: `[411][2]^6 Pt` where `Pt = pub struct Pt { x : i16, y : i16 }`.
+- Total elements: `411 x 64 = 26,304`.
+- Packed vector width: `26,304 x 32 = 841,728` bits (~0.803 MiBit).
+- `MID_IDX = 205`; frame-condition element `[205][1][0][0][0][0][0]` is element
+  number `205*64 + 32 = 13,152`.
+- Generator script: `scripts/gen_w796.py` (copy from `scripts/gen_w795.py`, set
+  `OUTER = 411` and `MID_IDX = 205`, fix destination path and module prefix).
 - Use `assert_eq` checks on changed elements (Icarus simulation path does not emit `assert_ne`).
 - Include `make_grid(32768)` period-identity check because `32768 == 0 (mod 32768)`.
 - Zero compiler / reference-model / FROZEN_HASH changes expected for the witness.
 
 ## Cooperation variants for next Wave Loop
 
-- **Variant A (recommended):** continue the odd outer-dimension ladder with `[411][2]^6 Pt`.
-- **Variant B:** keep width at ~0.799 MiBit but move the packed var to bench/function scope.
+- **Variant A (recommended):** continue the odd outer-dimension ladder with `[413][2]^6 Pt`.
+- **Variant B:** keep width at ~0.803 MiBit but move the packed var to bench/function scope.
 - **Variant C:** keep width and add `if`-guarded indexed signed field writes.

.trinity/current_task/.commit_count

@@ -1 +1 @@
-1623
+1624

.trinity/current_task/activity.md

@@ -3844,3 +3844,7 @@
 - **Commit:** docs(trinity): Wave Loop 794 closeout, report, and W795 cooperation variants
 - **Files:** .claude/plans/wave-loop-795.md,.claude/plans/wave-loop-796.md,.claude/skills/t27-wave-loop.md,.trinity/current-issue.md,.trinity/current_task/.commit_count,.trinity/current_task/session_log.jsonl,.trinity/experience.md,.trinity/seals/scratch_w795_bench_module_409x2p6_aos_var_call_write.json,bootstrap/tests/icarus_lowerable.rs,docs/NOW.md,docs/reports/FPGA_LOOP_CLOSEOUT_W795_2026-07-24.md,scripts/gen_w795.py,specs/scratch/w795_bench_module_409x2p6_aos_var_call_write.t27
 
+## 2026-07-25T10:17:14Z — wave-loop-796
+- **Commit:** feat(igla): Wave Loop 795 — module-scope [409][2]^6 Pt non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
+- **Files:** .claude/plans/wave-loop-797.md,.claude/skills/t27-wave-loop.md,.trinity/current-issue.md,.trinity/current_task/.commit_count,.trinity/current_task/session_log.jsonl,.trinity/experience.md,.trinity/seals/scratch_w796_bench_module_411x2p6_aos_var_call_write.json,bootstrap/tests/icarus_lowerable.rs,docs/NOW.md,docs/reports/FPGA_LOOP_CLOSEOUT_W796_2026-07-24.md,scripts/gen_w796.py,specs/scratch/w796_bench_module_411x2p6_aos_var_call_write.t27
+

.trinity/current_task/session_log.jsonl

@@ -796,3 +796,4 @@
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+{"ts":"2026-07-25T10:07:10Z","branch":"wave-loop-795","msg":"docs(trinity): Wave Loop 794 closeout, report, and W795 cooperation variants","files":".claude/plans/wave-loop-795.md,.claude/plans/wave-loop-796.md,.claude/skills/t27-wave-loop.md,.trinity/current-issue.md,.trinity/current_task/.commit_count,.trinity/current_task/session_log.jsonl,.trinity/experience.md,.trinity/seals/scratch_w795_bench_module_409x2p6_aos_var_call_write.json,bootstrap/tests/icarus_lowerable.rs,docs/NOW.md,docs/reports/FPGA_LOOP_CLOSEOUT_W795_2026-07-24.md,scripts/gen_w795.py,specs/scratch/w795_bench_module_409x2p6_aos_var_call_write.t27","notebook":"b83263109fb055dc"}