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feat(igla): Wave Loop 816 — module-scope [451][2]^6 Pt non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
Closes #1561 - Witness: specs/scratch/w816_bench_module_451x2p6_aos_var_call_write.t27 (28,864 elements, 923,648 bits, ~0.881 MiBit) - Generator: scripts/gen_w816.py (OUTER=451, MID_IDX=225) - Seal: .trinity/seals/scratch_w816_bench_module_451x2p6_aos_var_call_write.json - Integration test: accepts_w816_bench_module_451x2p6_aos_var_call_write - Validation: icarus_lowerable 276/0; direct t27c parse/lowerable/simulate/cocotb/seal all PASS - Zero changes to compiler.rs, FROZEN_HASH, or cocotb reference model - Updated docs/NOW.md, .trinity/experience.md, .trinity/current-issue.md, skills, and persistent memory
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‎.claude/plans/wave-loop-817.md‎

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# Wave Loop 817 Plan — `[453][2]^6 Pt`
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**Date:** 2026-07-29
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**Branch base:** `wave-loop-816` (parent branch because earlier Wave Loop PRs remain open awaiting review)
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## Recommended variant A
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Extend the mechanical module-scope packed-array-of-struct ladder by one rung:
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- Generator `scripts/gen_w817.py` from `scripts/gen_w816.py`.
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- `OUTER = 453` (outer dimension +2), `MID_IDX = 453 // 2 = 226`.
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- Destination path and module header f-string both fixed from `w816`/`451` to `w817`/`453` before first run.
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- Generated witness `specs/scratch/w817_bench_module_453x2p6_aos_var_call_write.t27`.
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- 28,992 elements × 32 bits = 927,744 bits (~0.885 MiBit).
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## Variants for W817
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### A — `[453][2]^6 Pt` (recommended, mechanical ladder)
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Smallest reviewable diff; continues validation that t27c can lower ever-wider non-power-of-two packed vectors unchanged.
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### B — `[451][3]^6 Pt` stride scaling
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Keep outer dimension at the previous rung but grow the second inner dimension from `2` to `3`. This changes the element stride and tests whether the packed-vector layout formula generalizes beyond powers of two in inner dimensions. Larger (451 × 3 × 2^5 = 43,296 elements × 32 bits = 1.385 MiBit) and may need formula adjustments.
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### C — `[451][2]^6 Pt` negative-index wrap-around
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Add signed negative-index writes to the current witness (e.g. `dst[-1][...].x = 42`) to exercise wrap-around/undefined-behavior classification. Requires confirming the compiler either lowers a defined wrap or emits a clean diagnostic; do not silently pass broken code.
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## Procedure
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1. Create issue #1563 for Wave Loop 817.
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2. Create branch `wave-loop-817` from `wave-loop-816` HEAD.
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3. Copy generator, fix copy hazard, generate spec.
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4. Run `t27c parse`, `icarus-lowerable`, `icarus-simulate`, `icarus-cocotb`, `seal --save`.
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5. Add integration test to `bootstrap/tests/icarus_lowerable.rs`.
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6. Run validation matrix:
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- `cargo build --release -p t27c`
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- `cargo clippy -p t27c` (expect 780 warnings, 0 errors)
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- `cargo test -p t27c --bin t27c` (1494/0/2)
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- `cargo test -p tri` (78/0)
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- `cargo test -p flash-spi` (2/0)
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- `cargo test -p t27c --test bitnet_pipeline` (20/0)
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- `cargo test -p t27c --test bitnet_top` (17/0)
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- `cargo test -p t27c --test icarus_lowerable` (277/0)
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- `cargo test -p t27c --test verilog_const_array` (2/0)
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7. Refresh weak-point audit and literature scan.
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8. Write closeout report `docs/reports/FPGA_LOOP_CLOSEOUT_W817_2026-07-29.md`.
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9. Update live skill tracker, NOW.md, experience.md, persistent memory.
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10. Commit `Closes #1563`, push, open PR.

‎.claude/skills/t27-wave-loop.md‎

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## Worked example — Wave Loop 816
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Wave Loop 816 extended the module-scope packed-array-of-struct ladder with no
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compiler changes, branching from `wave-loop-815` HEAD because earlier wave PRs
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remained open awaiting review:
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- Generated `scripts/gen_w816.py` from `scripts/gen_w815.py` with `OUTER = 451`
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and `MID_IDX = 225`.
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- Fixed both the generator destination path and the module header f-string from
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stale `w815` / `449` references to `w816_bench_module_451x2p6_aos_var_call_write`
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before regenerating; also corrected the stale `MID_IDX` comment to `225`.
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- Produced `specs/scratch/w816_bench_module_451x2p6_aos_var_call_write.t27`
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(28,864 elements, 923,648-bit packed vector, ~0.881 MiBit).
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- Added integration test `accepts_w816_bench_module_451x2p6_aos_var_call_write`
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after the existing W815 tests in `bootstrap/tests/icarus_lowerable.rs`.
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- Ran `t27c parse`, `icarus-lowerable`, `icarus-simulate` (17 cycles, PASSED),
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`icarus-cocotb` (reference-model OK), and `t27c seal --save`.
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- No changes to `bootstrap/src/compiler.rs`, `bootstrap/stage0/FROZEN_HASH`, or
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`scripts/cocotb_ref_model.py` for the witness itself.
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- Validation: `cargo build --release -p t27c` green,
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`cargo clippy -p t27c` green (780 warnings, 0 errors),
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`cargo test -p t27c --bin t27c` 1494/0/2, `cargo test -p tri` 78/0,
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`cargo test -p flash-spi` 2/0,
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`cargo test -p t27c --test bitnet_pipeline` 20/0,
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`cargo test -p t27c --test bitnet_top` 17/0,
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`cargo test -p t27c --test icarus_lowerable` 276/0,
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`cargo test -p t27c --test verilog_const_array` 2/0.
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- Refreshed weak-point audit and 2025–2026 ternary/MVL literature scan.
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- Wrote `docs/reports/FPGA_LOOP_CLOSEOUT_W816_2026-07-29.md` and
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`.claude/plans/wave-loop-817.md` with three cooperation variants.
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- Updated `.claude/skills/wave-loop-autopilot.md` run-list and status.
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- Updated this skill's Live Wave Loop Tracker to wave 817.
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Key learning: the mechanical ladder is now 44 waves deep (W774–W816) with zero
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compiler changes, confirming the packed-vector AoS lowering is robust up to at
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least `[451][2]^6 Pt` (28,864 elements, ~0.881 MiBit). The generator copy hazard
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remains the only manual failure mode and continues to span two text locations.
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A parameterized wave-prefix variable in the generator template would eliminate
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both. Continue grepping for stale wave numbers and outer dimensions after each
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copy, keep the `make_grid(32768)` period-identity check, and use `assert_eq` on
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changed elements because `assert_ne` is not emitted by the Icarus simulation path.
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## Live Wave Loop Tracker
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This section is updated at the end of every completed Wave Loop. It is the
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| Field | Value |
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|-------|-------|
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| **Current wave** | 816 |
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| **Issue** | #1561 (to open) |
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| **Branch** | `wave-loop-816` |
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| **Parent branch** | `wave-loop-815` HEAD because earlier wave PRs remain open |
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| **Recommended variant** | A — module-scope `[451][2]^6 Pt` packed array-of-struct variable from call with indexed signed writes |
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| **Current wave** | 817 |
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| **Issue** | #1563 (to open) |
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| **Branch** | `wave-loop-817` |
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| **Parent branch** | `wave-loop-816` HEAD because earlier wave PRs remain open |
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| **Recommended variant** | A — module-scope `[453][2]^6 Pt` packed array-of-struct variable from call with indexed signed writes |
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| **Status** | READY TO START |
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| **Next wave variants queued** | W817 Variant A `[453][2]^6 Pt`; Variant B `[451][3]^6 Pt` stride scaling; Variant C `[451][2]^6 Pt` negative-index wrap-around |
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| **Next wave variants queued** | W818 Variant A `[455][2]^6 Pt`; Variant B `[453][3]^6 Pt` stride scaling; Variant C `[453][2]^6 Pt` negative-index wrap-around |
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### Open backlog (non-blocking)
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‎.claude/skills/wave-loop-autopilot.md‎

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| 813 | #1555 | wave-loop-813 | 445 | 222 | 28,480 | 911,360 | 0.869 | closed | TBD |
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| 814 | #1557 | wave-loop-814 | 447 | 223 | 28,608 | 915,456 | 0.873 | closed | #1556 |
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| 815 | #1559 | wave-loop-815 | 449 | 224 | 28,736 | 919,552 | 0.877 | closed | TBD |
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| **816** | **#1561** | **wave-loop-816** | **451** | **225** | **28,864** | **923,648** | **0.881** | **READY** | **TBD** |
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| 817 | #1563 | wave-loop-817 | 453 | 226 | 28,992 | 927,744 | 0.885 | planned | TBD |
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| 816 | #1561 | wave-loop-816 | 451 | 225 | 28,864 | 923,648 | 0.881 | closed | TBD |
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| **817** | **#1563** | **wave-loop-817** | **453** | **226** | **28,992** | **927,744** | **0.885** | **READY** | **TBD** |
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| 818 | #1565 | wave-loop-818 | 455 | 227 | 29,120 | 931,840 | 0.889 | planned | TBD |
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| 819 | #1567 | wave-loop-819 | 457 | 228 | 29,248 | 935,936 | 0.893 | planned | TBD |
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| 820 | #1569 | wave-loop-820 | 459 | 229 | 29,376 | 940,032 | 0.897 | planned | TBD |
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### Run-list notes
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- Issue numbers follow the observed pattern (issue = previous issue + 2; PR = issue + 1).
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## Current status
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- **Latest completed wave:** 815
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- **Latest issue/PR:** #1559 / TBD
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- **Current wave in progress:** 816
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- **Next wave queued:** 817
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- **Ladder depth:** W774–W815 = 43 waves
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- **Latest completed wave:** 816
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- **Latest issue/PR:** #1561 / TBD
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- **Current wave in progress:** 817
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- **Next wave queued:** 818
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- **Ladder depth:** W774–W816 = 44 waves
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*φ² + φ⁻² = 3 | TRINITY*

‎.trinity/current-issue.md‎

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# Current Issue — Wave Loop 816
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# Current Issue — Wave Loop 817
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| Field | Value |
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| Wave | 816 |
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| Issue | #1561 |
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| Branch | `wave-loop-816` |
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| Base | `wave-loop-815` (parent branch because earlier waves' PRs remain open) |
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| Variant | `[451][2]^6 Pt` module-scope AoS variable from call with indexed signed writes |
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| Target packed vector | 28,864 elements × 32 bits = 923,648 bits (~0.881 MiBit) |
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| Wave | 817 |
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| Issue | #1563 |
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| Branch | `wave-loop-817` |
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| Base | `wave-loop-816` (parent branch because earlier waves' PRs remain open) |
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| Variant | `[453][2]^6 Pt` module-scope AoS variable from call with indexed signed writes |
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| Target packed vector | 29,056 elements × 32 bits = 929,792 bits (~0.886 MiBit) |
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| Status | planned |
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## Goal
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Increment the non-power-of-two outer-dimension ladder by one rung to `[451][2]^6 Pt`, keeping the established inner-dimension (`2^6`) and struct (`Pt { x : i16, y : i16 }`) pattern. Validate that t27c still lowers, simulates, cocotb-matches, and seals the wider packed vector without compiler or FROZEN_HASH changes.
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Increment the non-power-of-two outer-dimension ladder by one rung to `[453][2]^6 Pt`, keeping the established inner-dimension (`2^6`) and struct (`Pt { x : i16, y : i16 }`) pattern. Validate that t27c still lowers, simulates, cocotb-matches, and seals the wider packed vector without compiler or FROZEN_HASH changes.
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## Acceptance criteria
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- [ ] Generator `scripts/gen_w816.py` with `OUTER = 451`, `MID_IDX = 225`; copy hazard fixed before first run.
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- [ ] Witness `specs/scratch/w816_bench_module_451x2p6_aos_var_call_write.t27` generated and parsed.
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- [ ] Generator `scripts/gen_w817.py` with `OUTER = 453`, `MID_IDX = 226`; copy hazard fixed before first run.
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- [ ] Witness `specs/scratch/w817_bench_module_453x2p6_aos_var_call_write.t27` generated and parsed.
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- [ ] `t27c icarus-lowerable`, `icarus-simulate`, `icarus-cocotb`, and `seal --save` all PASS.
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- [ ] Integration test `accepts_w816_bench_module_451x2p6_aos_var_call_write` added to `bootstrap/tests/icarus_lowerable.rs`.
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- [ ] Integration test `accepts_w817_bench_module_453x2p6_aos_var_call_write` added to `bootstrap/tests/icarus_lowerable.rs`.
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- [ ] `bootstrap/stage0/FROZEN_HASH` unchanged.
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- [ ] Closeout report, next-wave plan, docs, skill tracker, autopilot skill, and persistent memory updated.
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- [ ] Commit with `Closes #1561`, push branch, open PR to `master`.
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- [ ] Commit with `Closes #1563`, push branch, open PR to `master`.
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## Cooperation variants for W817
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- **A (recommended):** `[453][2]^6 Pt`, outer += 2, MID_IDX = 226.
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- **B:** `[451][3]^6 Pt` — grow the second inner dimension to stress stride scaling.
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- **C:** `[451][2]^6 Pt` with negative-index writes to exercise wrap-around addressing.
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## Cooperation variants for W818
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- **A (recommended):** `[455][2]^6 Pt`, outer += 2, MID_IDX = 227.
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- **B:** `[453][3]^6 Pt` — grow the second inner dimension to stress stride scaling.
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- **C:** `[453][2]^6 Pt` with negative-index writes to exercise wrap-around addressing.

‎.trinity/current_task/activity.md‎

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- **Commit:** docs: update Wave Loop tracker and NOW.md with W814 PR #1556
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- **Files:** .claude/plans/wave-loop-816.md,.claude/skills/t27-wave-loop.md,.claude/skills/wave-loop-autopilot.md,.trinity/current-issue.md,.trinity/current_task/.commit_count,.trinity/current_task/session_log.jsonl,.trinity/experience.md,.trinity/seals/scratch_w815_bench_module_449x2p6_aos_var_call_write.json,bootstrap/tests/icarus_lowerable.rs,docs/NOW.md,docs/reports/FPGA_LOOP_CLOSEOUT_W815_2026-07-29.md,scripts/gen_w815.py,specs/scratch/w815_bench_module_449x2p6_aos_var_call_write.t27
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## 2026-07-29T15:14:24Z — wave-loop-816
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- **Commit:** feat(igla): Wave Loop 815 — module-scope [449][2]^6 Pt non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
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- **Files:** .claude/plans/wave-loop-817.md,.claude/skills/t27-wave-loop.md,.claude/skills/wave-loop-autopilot.md,.trinity/current-issue.md,.trinity/experience.md,.trinity/seals/scratch_w816_bench_module_451x2p6_aos_var_call_write.json,bootstrap/tests/icarus_lowerable.rs,docs/NOW.md,docs/reports/FPGA_LOOP_CLOSEOUT_W816_2026-07-29.md,scripts/gen_w816.py,specs/scratch/w816_bench_module_451x2p6_aos_var_call_write.t27
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‎.trinity/experience.md‎

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## 2026-07-29 — Wave Loop 816 (module-scope `[451][2]^6 Pt` non-power-of-two outer-dimension AoS variable, issue #1561)
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### What worked
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- Variant A extended the module-scope packed AoS odd outer-dimension ladder to 451.
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The `[451][2]^6 Pt` witness is 923,648 bits (~0.881 MiBit), still well under the 4-MiBit
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cliff, and required no compiler changes.
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- A module-level `pub var dst : [451][2]^6 Pt` can be initialized from a function
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call and exercised with indexed signed field writes, with zero compiler changes.
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- The cocotb/Python reference model correctly mirrored the row-major flattening
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with outer stride 451, confirming the layout is preserved end-to-end.
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- Reused the corrected W632 element-index formula for mid-row expected values:
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`[r][a5][a4][a3][a2][a1][a0]` is element `r*64 + a5*32 + a4*16 + a3*8 + a2*4 + a1*2 + a0`.
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- For `OUTER = 451`, `MID_IDX = 225`; the frame-condition element is
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`[225][1][0][0][0][0][0]`, element number `225*64 + 32 = 14,432`.
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- The generator copy hazard struck again after copying `scripts/gen_w815.py` →
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`scripts/gen_w816.py`. Both the destination path and the module header f-string
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carried stale `w815` / `449` references. Fixing both before regenerating resolved it.
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The stale `MID_IDX` comment was also corrected to `225`.
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This is the same hazard documented in W782–W815 learnings and remains the only
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manual step in the otherwise mechanical flow.
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- Fresh weak-point audit (2026-07-29) found no new actionable items. The W783 fix
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for `bootstrap/tests/verilog_const_array.rs:166` remains green; the pre-existing
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`verilog_array_literal_expr` regression is still out of scope for the witness ladder.
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- 30-day subject-line traceability remained low; the closeout commit carries
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`Closes #1561` in the subject, but the overall rate needs improvement.
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Continue putting issue references in commit subjects.
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- Updated the live Wave Loop Tracker in `.claude/skills/t27-wave-loop.md` to wave 817.
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- Updated `.claude/skills/wave-loop-autopilot.md` to mark W816 READY, W817 planned,
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and refreshed the master run-list.
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### What changed behavior
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- No changes to `bootstrap/src/compiler.rs`.
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- No changes to `bootstrap/stage0/FROZEN_HASH` (`68a0b933c00ba5efd7facb5997f00880c3eecae55e6ac5e8cea2aee399b92adc`).
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- No changes to `scripts/cocotb_ref_model.py`.
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- Added `specs/scratch/w816_bench_module_451x2p6_aos_var_call_write.t27` (~1,981 KB /
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~85,751 lines) with seal and Icarus baseline.
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- Added integration test `accepts_w816_bench_module_451x2p6_aos_var_call_write`
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in `bootstrap/tests/icarus_lowerable.rs`.
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- Added generator script `scripts/gen_w816.py`.
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- Wrote `docs/reports/FPGA_LOOP_CLOSEOUT_W816_2026-07-29.md` and
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`.claude/plans/wave-loop-817.md` with three cooperation variants.
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- Updated `.claude/skills/t27-wave-loop.md` live tracker to wave 817.
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### Validation
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- `cargo build --release -p t27c`: OK.
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- `cargo clippy -p t27c`: OK (780 warnings, 0 errors).
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- `cargo test -p t27c --bin t27c`: 1494 passed; 0 failed; 2 ignored.
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- `cargo test -p tri`: 78 passed; 0 failed.
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- `cargo test -p flash-spi`: 2 passed; 0 failed.
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- `cargo test -p t27c --test bitnet_pipeline`: 20 passed; 0 failed.
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- `cargo test -p t27c --test bitnet_top`: 17 passed; 0 failed.
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- `cargo test -p t27c --test icarus_lowerable`: 276 passed; 0 failed.
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- `cargo test -p t27c --test verilog_const_array`: 2 passed; 0 failed.
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- Direct `t27c parse` W816: PASS.
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- Direct `t27c icarus-lowerable` W816: PASS (`lowerable`).
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- Direct `t27c icarus-simulate` W816: PASS (17 cycles, PASSED).
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- Direct `t27c icarus-cocotb` W816: PASS (`reference-model OK`).
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- Direct `t27c seal --save` W816: PASS.
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### Scientific / engineering background
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- IEEE 1800-2017 §7.4.1/7.4.3 define packed-array width as the product of packed
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dimensions, with no power-of-two restriction. Variant A emits a single
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923,648-bit packed vector, which is legal SystemVerilog.
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## 2026-07-29 — Wave Loop 815 (module-scope `[449][2]^6 Pt` non-power-of-two outer-dimension AoS variable, issue #1559)
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### What worked

‎.trinity/seals/scratch_w816_bench_module_451x2p6_aos_var_call_write.json‎

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{
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"gen_hash_c": "sha256:abe188a8c4ed5d8f25b9239402044ff3fa430a2d716e73dd9b0c3a2981355433",
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"gen_hash_rust": "sha256:5542dd7f724ea206dae19f60b1aaa663ec05e656d2a21426e1d1e6f0a1842e9e",
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"gen_hash_verilog": "sha256:2f6834b9b2c0451b2fe93202634d4e50797f4fd21bb623c6b243f2893e9b9ab4",
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"gen_hash_zig": "sha256:ed2ba719fb2b7f2b65df422880b0baa8b1aff0f8c879e477d25adbea9f191b0b",
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"module": "w816_bench_module_451x2p6_aos_var_call_write",
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"ring": 12,
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"sealed_at": "2026-07-29T15:06:38Z",
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"spec_hash": "sha256:d287ffda33e77a6a2904a933ce111c3cd0a7851332fcf01cfe569fde627ce1a0",
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"spec_path": "/Users/playra/t27/specs/scratch/w816_bench_module_451x2p6_aos_var_call_write.t27"
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}

‎bootstrap/tests/icarus_lowerable.rs‎

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@@ -4981,6 +4981,24 @@ fn accepts_w815_bench_module_449x2p6_aos_var_call_write() {
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}
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}
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#[test]
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fn accepts_w816_bench_module_451x2p6_aos_var_call_write() {
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let dir = scratch_dir();
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for name in &[
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"w816_bench_module_451x2p6_aos_var_call_write.t27",
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] {
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let p = dir.join(name);
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assert!(p.exists(), "missing W816 witness {}", p.display());
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let (lowerable, json) = run_icarus_lowerable(&p);
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assert!(
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lowerable,
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"expected {} to be lowerable, got: {}",
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p.display(),
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json
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);
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}
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}
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#[test]
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fn accepts_known_lowerable_witnesses() {
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let dir = scratch_dir();

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