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feat(igla): Wave Loop 797 — module-scope [413][2]^6 Pt non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
Closes #1523 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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.claude/plans/wave-loop-798.md

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# Wave Loop 798 Plan — Variant A (recommended)
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**Date:** 2026-07-24
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**Anchor:** φ² + φ⁻² = 3 | TRINITY
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**Branch:** `wave-loop-798` (to be created from `wave-loop-797` HEAD because earlier wave PRs remain open)
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**Issue:** TBD (next available GitHub issue after W797 PR is opened)
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**Cooperation variant:** A
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## Goal
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Continue the module-scope packed array-of-struct ladder with the recommended Variant A shape: module-scope `[415][2]^6 Pt` initialized from a function call and exercised with indexed signed field writes, then read back with `assert_eq` in a `bench` block.
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## Acceptance criteria
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1. `specs/scratch/w798_bench_module_415x2p6_aos_var_call_write.t27` is generated and parses.
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2. The witness is Icarus-lowerable and simulates correctly (17 cycles, PASSED).
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3. The cocotb reference model matches the t27 semantics.
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4. `t27c seal --save` succeeds and `FROZEN_HASH` stays unchanged.
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5. All cargo suites remain green.
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6. Integration test `accepts_w798_bench_module_415x2p6_aos_var_call_write` is added to `bootstrap/tests/icarus_lowerable.rs`.
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7. Closeout report `docs/reports/FPGA_LOOP_CLOSEOUT_W798_2026-07-24.md` is written with weak-point audit, literature scan, and validation matrix.
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8. Next-wave plan `.claude/plans/wave-loop-799.md` with three cooperation variants is created.
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9. Learning is saved to `.trinity/experience.md`, `.claude/skills/t27-wave-loop.md`, persistent memory, and `.trinity/current-issue.md`.
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## Technical notes
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- Shape: `[415][2]^6 Pt` where `Pt = pub struct Pt { x : i16, y : i16 }`.
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- Total elements: `415 x 64 = 26,560`.
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- Packed vector width: `26,560 x 32 = 849,920` bits (~0.810 MiBit).
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- `MID_IDX = 207`; frame-condition element `[207][1][0][0][0][0][0]` is element number `207*64 + 32 = 13,280`.
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- Generator script `scripts/gen_w798.py` should be copied from `scripts/gen_w797.py`, update `OUTER = 415` and `MID_IDX = 207`, and fix the destination path and hardcoded module prefix in the f-string header.
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- Use `assert_eq` on changed elements (`assert_ne` is not emitted by the Icarus simulation path).
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- Include `make_grid(32768)` period-identity check because `32768 == 0 (mod 32768)`.
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- Zero compiler / reference-model / FROZEN_HASH changes expected for the witness.
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## Decomposition
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### Phase A — Branch setup (5 min)
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1. Create `wave-loop-798` from `wave-loop-797` HEAD because earlier wave PRs remain open.
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2. Open next GitHub issue when ready.
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### Phase B — Spec + generator (15 min)
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3. Copy `scripts/gen_w797.py` to `scripts/gen_w798.py`.
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4. Update `OUTER = 415`, `MID_IDX = 207`, fix destination path and module prefix.
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5. Run generator to produce `specs/scratch/w798_bench_module_415x2p6_aos_var_call_write.t27`.
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6. Verify module name and destination path have no stale `w797` / `413` references.
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### Phase C — Test + validation (45 min)
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7. Add integration test `accepts_w798_bench_module_415x2p6_aos_var_call_write` to `bootstrap/tests/icarus_lowerable.rs`.
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8. `cargo build --release -p t27c`.
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9. `t27c parse`, `icarus-lowerable`, `icarus-simulate` (expected 17 cycles), `icarus-cocotb` on the W798 witness.
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10. `t27c seal --save` the witness; confirm `FROZEN_HASH` unchanged.
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11. `cargo test -p t27c --bin t27c`, `cargo test -p tri`, `cargo test -p t27c --test icarus_lowerable`, `cargo test -p t27c --test verilog_const_array`.
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12. `cargo clippy -p t27c`.
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### Phase D — Closeout + cooperation variants (30 min)
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13. Write `docs/reports/FPGA_LOOP_CLOSEOUT_W798_2026-07-24.md` with audit, literature, validation, and three W799 cooperation variants.
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14. Update `docs/NOW.md` and `.trinity/current-issue.md`.
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### Phase E — Save skills + memory (15 min)
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15. Append W798 worked example to `.claude/skills/t27-wave-loop.md`.
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16. Update `.trinity/experience.md`.
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17. Save memory file `wave-loop-798.md` and pointer in `MEMORY.md`.
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## Cooperation variants for Wave Loop 799
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- **Variant A (recommended):** continue odd outer-dimension ladder with `[417][2]^6 Pt` (~0.814 MiBit, 26,688 elements, 854,016-bit packed vector). Zero compiler changes expected.
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- **Variant B:** keep `[415][2]^6 Pt` width but move the packed var to bench/function scope to exercise function-local non-power-of-two packed arrays.
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- **Variant C:** keep `[415][2]^6 Pt` width and add `if`-guarded indexed signed field writes to exercise control-flow + packed-vector writes.
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## Exit criteria
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- W798 witness parses, lowers, simulates, cocotb-matches, and seals.
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- All cargo suites green.
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- Closeout report written.
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- `.trinity/experience.md` updated.
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- Skills and memory saved.
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- Commit with `Closes #N`, push `wave-loop-798`, open PR.
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*φ² + φ⁻² = 3 | TRINITY*

.claude/skills/t27-wave-loop.md

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`make_grid(32768)` period-identity check, and use `assert_eq` on changed elements
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because `assert_ne` is not emitted by the Icarus simulation path.
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## Worked example — Wave Loop 797
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Wave Loop 797 continued the module-scope packed-array-of-struct ladder with no
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compiler changes, branching from `wave-loop-796` HEAD because earlier wave PRs
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remained open awaiting review:
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- Generated `scripts/gen_w797.py` from `scripts/gen_w796.py` with `OUTER = 413`
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and `MID_IDX = 206`.
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- Fixed both the generator destination path and the module header f-string from
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stale `w796` / `411` references to `w797_bench_module_413x2p6_aos_var_call_write`
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before regenerating.
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- Produced `specs/scratch/w797_bench_module_413x2p6_aos_var_call_write.t27`
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(26,432 elements, 845,824-bit packed vector, ~0.807 MiBit).
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- Added integration test `accepts_w797_bench_module_413x2p6_aos_var_call_write`
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after the existing W796 tests in `bootstrap/tests/icarus_lowerable.rs`.
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- Ran `t27c parse`, `icarus-lowerable`, `icarus-simulate` (17 cycles, PASSED),
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`icarus-cocotb` (reference-model OK), and `t27c seal --save`.
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- No changes to `bootstrap/src/compiler.rs`, `bootstrap/stage0/FROZEN_HASH`, or
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`scripts/cocotb_ref_model.py` for the witness itself.
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- Validation: `cargo build --release -p t27c` green,
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`cargo clippy -p t27c` green (780 warnings, 0 errors),
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`cargo test -p t27c --bin t27c` 1494/0/2, `cargo test -p tri` 78/0,
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`cargo test -p flash-spi` 2/0,
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`cargo test -p t27c --test bitnet_pipeline` 20/0,
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`cargo test -p t27c --test bitnet_top` 17/0,
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`cargo test -p t27c --test icarus_lowerable` 257/0,
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`cargo test -p t27c --test verilog_const_array` 2/0.
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- Refreshed weak-point audit and 2025–2026 ternary/MVL literature scan.
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- Wrote `docs/reports/FPGA_LOOP_CLOSEOUT_W797_2026-07-24.md` and
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`.claude/plans/wave-loop-798.md` with three cooperation variants.
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Key learning: the mechanical ladder is now 25 waves deep (W774–W797) with zero
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compiler changes, confirming the packed-vector AoS lowering is robust up to at
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least `[413][2]^6 Pt` (26,432 elements, ~0.807 MiBit). The generator copy hazard
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continues to be the only manual failure mode, and it now spans two distinct text
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locations (destination path + module header f-string). A single parameterized
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wave-prefix variable in the generator template would eliminate both. Continue
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grepping for stale wave numbers and outer dimensions after each copy, keep the
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`make_grid(32768)` period-identity check, and use `assert_eq` on changed elements
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because `assert_ne` is not emitted by the Icarus simulation path.
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*φ² + φ⁻² = 3 | TRINITY*

.trinity/current-issue.md

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# Wave Loop 796 — Issue #1521
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# Current Issue — Wave Loop 798 setup
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**Branch:** `wave-loop-796`
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**Parent branch:** `wave-loop-795` HEAD (`58d5a870a`)
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**Date:** 2026-07-24
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**Issue:** #1521
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**PR:** #1522
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**Cooperation variant:** A (recommended)
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**Status:** closeout complete
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**Anchor:** φ² + φ⁻² = 3 | TRINITY
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## Goal
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## Active wave
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- **Wave:** 798
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- **Issue:** TBD (open after W797 PR #1524 is created)
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- **Branch:** `wave-loop-798` (to create from `wave-loop-797` HEAD because earlier PRs remain open)
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- **Plan:** `.claude/plans/wave-loop-798.md`
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- **Recommended variant:** A — module-scope `[415][2]^6 Pt` packed array-of-struct variable from call with indexed signed writes.
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Close Wave Loop 796 by validating a module-scope `[411][2]^6 Pt` packed
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array-of-struct variable initialized from a function call, with indexed signed
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field writes and `assert_eq` read-back in a `bench` block.
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## Goal
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Earlier wave PRs remain open awaiting review, so W796 was branched from
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`wave-loop-795` HEAD to avoid blocking the sequence.
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Continue the odd outer-dimension module-scope packed array-of-struct ladder with `[415][2]^6 Pt`.
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Expected 26,560 elements, 849,920-bit packed vector (~0.810 MiBit), still under the 4-MiBit cliff,
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with zero compiler / reference-model / FROZEN_HASH changes.
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## Acceptance criteria
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1. [x] `specs/scratch/w796_bench_module_411x2p6_aos_var_call_write.t27` is generated and parses.
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2. [x] The witness is Icarus-lowerable and simulates correctly (17 cycles, PASSED).
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3. [x] The cocotb reference model matches the t27 semantics.
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4. [x] `t27c seal --save` succeeds and FROZEN_HASH remains unchanged.
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5. [x] All cargo suites remain green, including `cargo clippy -p t27c`.
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6. [x] Integration test `accepts_w796_bench_module_411x2p6_aos_var_call_write` is added.
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7. [x] Closeout report `docs/reports/FPGA_LOOP_CLOSEOUT_W796_2026-07-24.md` is written.
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8. [x] Learning is saved to `.trinity/experience.md`, memory, `.claude/skills/t27-wave-loop.md`, and `.trinity/current-issue.md`.
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9. [x] `.claude/plans/wave-loop-797.md` with three cooperation variants is created.
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10. [x] Commit with `Closes #1521`, push `wave-loop-796`, open PR #1522.
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## Technical notes
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- Shape: `[411][2]^6 Pt` where `Pt = pub struct Pt { x : i16, y : i16 }`.
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- Total elements: `411 x 64 = 26,304`.
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- Packed vector width: `26,304 x 32 = 841,728` bits (~0.803 MiBit).
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- `MID_IDX = 205`; frame-condition element `[205][1][0][0][0][0][0]` is element
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number `205*64 + 32 = 13,152`.
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- Generator script: `scripts/gen_w796.py` (copy from `scripts/gen_w795.py`, set
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`OUTER = 411` and `MID_IDX = 205`, fix destination path and module prefix).
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- Use `assert_eq` checks on changed elements (Icarus simulation path does not emit `assert_ne`).
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- Include `make_grid(32768)` period-identity check because `32768 == 0 (mod 32768)`.
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- Zero compiler / reference-model / FROZEN_HASH changes expected for the witness.
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## Cooperation variants for next Wave Loop
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- **Variant A (recommended):** continue the odd outer-dimension ladder with `[413][2]^6 Pt`.
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- **Variant B:** keep width at ~0.803 MiBit but move the packed var to bench/function scope.
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- **Variant C:** keep width and add `if`-guarded indexed signed field writes.
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1. `specs/scratch/w798_bench_module_415x2p6_aos_var_call_write.t27` is generated and parses.
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2. Icarus-lowerable, simulates (17 cycles, PASSED), and cocotb reference-model matches.
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3. `t27c seal --save` succeeds and `FROZEN_HASH` stays unchanged.
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4. All cargo suites green.
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5. Integration test added to `bootstrap/tests/icarus_lowerable.rs`.
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6. Closeout report written with weak-point audit, literature scan, and three W799 cooperation variants.
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7. Skills and experience saved.
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## Notes
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- Copy `scripts/gen_w797.py` to `scripts/gen_w798.py`, update `OUTER = 415` and `MID_IDX = 207`, and fix the destination path/module header copy hazard before generating.
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- Use `assert_eq` on changed elements; `assert_ne` is not emitted by the Icarus simulation path.
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- Keep the `make_grid(32768)` period-identity check because `32768 ≡ 0 (mod 32768)`.
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---
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φ² + 1/φ² = 3 | TRINITY
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.trinity/current_task/activity.md

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- **Commit:** feat(igla): Wave Loop 795 — module-scope [409][2]^6 Pt non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
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- **Files:** .claude/plans/wave-loop-797.md,.claude/skills/t27-wave-loop.md,.trinity/current-issue.md,.trinity/current_task/.commit_count,.trinity/current_task/session_log.jsonl,.trinity/experience.md,.trinity/seals/scratch_w796_bench_module_411x2p6_aos_var_call_write.json,bootstrap/tests/icarus_lowerable.rs,docs/NOW.md,docs/reports/FPGA_LOOP_CLOSEOUT_W796_2026-07-24.md,scripts/gen_w796.py,specs/scratch/w796_bench_module_411x2p6_aos_var_call_write.t27
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## 2026-07-25T10:29:29Z — wave-loop-797
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- **Commit:** feat(igla): Wave Loop 796 — module-scope [411][2]^6 Pt non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
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- **Files:** .claude/plans/wave-loop-798.md,.claude/skills/t27-wave-loop.md,.trinity/current-issue.md,.trinity/current_task/.commit_count,.trinity/current_task/session_log.jsonl,.trinity/experience.md,.trinity/seals/scratch_w797_bench_module_413x2p6_aos_var_call_write.json,bootstrap/tests/icarus_lowerable.rs,docs/NOW.md,docs/reports/FPGA_LOOP_CLOSEOUT_W797_2026-07-24.md,scripts/gen_w797.py,specs/scratch/w797_bench_module_413x2p6_aos_var_call_write.t27
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.trinity/current_task/session_log.jsonl

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