chore(now): set W437 PR number to #1408

Closes #1405

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

Author: Dmitrii Vasilev

.trinity/current_task/activity.md

@@ -1656,3 +1656,7 @@
 - **Commit:** chore(now): set W436 PR number to #1406
 - **Files:** .trinity/current-issue.md,.trinity/current_task/.commit_count,.trinity/current_task/session_log.jsonl,cli/tri/src/fpga.rs,docs/NOW.md,docs/reports/FPGA_LOOP_COOPERATION_W438_2026-07-01.md,docs/reports/FPGA_LOOP_EVIDENCE_W437_2026-07-01.md,docs/reports/GEN_VERILOG_DEFECTS_REPRO.md,docs/reports/T27_VS_FORMAL_HDL_2026.md,docs/reports/WAVE_LOOP_437_REPORT.md,fpga/HARDWARE_SSOT.md
 
+## 2026-07-05T13:35:43Z — wave-loop-438
+- **Commit:** feat(igla): Wave Loop 437 — dry-run synthetic XADC→PVT validation, verify-lean gate, public PVT resolver
+- **Files:** docs/NOW.md
+

docs/NOW.md

@@ -232,7 +232,7 @@
 
 - Branch: `wave-loop-437`
 - Issue: #1405
-- PR: (to open after this close-out)
+- PR: #1408
 - Report: `docs/reports/WAVE_LOOP_437_REPORT.md`
 - Evidence W437: `docs/reports/FPGA_LOOP_EVIDENCE_W437_2026-07-01.md`
 - Cooperation W438: `docs/reports/FPGA_LOOP_COOPERATION_W438_2026-07-01.md`