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Wave Loop 372 — IGLA CODER+RACE + retry board flash + one safe gen-verilog sub-fix

Status: Open.

#1261 In gHashTag/t27;

· gHashTag opened on Jul 2, 2026

Wave Loop 371 — IGLA CODER+RACE + retry board flash + one safe gen-verilog sub-fix

Status: Open.

#1260 In gHashTag/t27;

· gHashTag opened on Jul 2, 2026

Wave Loop 370 — IGLA CODER+RACE + retry board flash + one safe gen-verilog sub-fix

Status: Open.

#1259 In gHashTag/t27;

· gHashTag opened on Jul 2, 2026

gen-verilog: incremental array/RAM lowering for datapath specs (fifo/memory)

Status: Open.

#1258 In gHashTag/t27;

· gHashTag opened on Jul 2, 2026

Wave Loop 369 — IGLA CODER+RACE + retry board flash + one safe gen-verilog sub-fix

Status: Open.

#1257 In gHashTag/t27;

· gHashTag opened on Jul 2, 2026

Wave Loop 368 — IGLA CODER+RACE + retry board flash + one safe gen-verilog fix

Status: Open.

#1256 In gHashTag/t27;

· gHashTag opened on Jul 1, 2026

Wave Loop 367 — IGLA CODER+RACE + retry board flash + one safe gen-verilog fix

Status: Open.

#1253 In gHashTag/t27;

· gHashTag opened on Jul 1, 2026

Wave Loop 366 — IGLA CODER+RACE + retry board flash + one safe gen-verilog sub-fix

Status: Open.

#1252 In gHashTag/t27;

· gHashTag opened on Jul 1, 2026

Wave Loop 365 — IGLA CODER+RACE + retry board flash + gen-verilog weak-point triage

Status: Open.

#1251 In gHashTag/t27;

· gHashTag opened on Jul 1, 2026

Wave Loop 364 — IGLA CODER+RACE + retry board flash + gen-verilog weak-point probe

Status: Open.

#1249 In gHashTag/t27;

· gHashTag opened on Jul 1, 2026

Wave Loop 362 — IGLA CODER+RACE + board flash of first OpenXC7 ternary MAC bitstream

Status: Open.

#1246 In gHashTag/t27;

· gHashTag opened on Jul 1, 2026

Port trios-mesh BPSK modem core to a .t27 FPGA spec (TRI-NET radio PHY)

Status: Open.

#1243 In gHashTag/t27;

· gHashTag opened on Jul 1, 2026