Wave Loop 426 — finite-grid PVT theorems, machine-readable tri fpga JSON, competitor refresh (Closes #1376)#1378

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Commits on Jul 4, 2026

feat(igla): Wave Loop 420 — VCD exact-terminator + real-net auto-threshold, PVT process-corner monotonicity

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docs(now): record W420 PR #1362 and merge-pending status

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docs(issue): set current issue to Wave Loop 421

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feat(igla): Wave Loop 421 — VCD $timescale exact terminator, combined PVT monotonicity, competitor snapshot

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docs(issue): set current issue to Wave Loop 422\n\nCloses #1365\n\nCo-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Dmitrii Vasilev
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Commits on Jul 5, 2026

feat(igla): Wave Loop 422 — live XC7A200T SRAM boot, Verilog keyword escape, PVT worst-case bound

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docs(issue): set current issue to Wave Loop 423

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feat(igla): Wave Loop 423 — CSV time units, VCD slope filter, PVT worst-case, competitor refresh (Closes #1368)

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setup(igla): Wave Loop 424 branch and issue (#1371)

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feat(igla): Wave Loop 424 — FPGA tooling hardening, PVT context, CSV voltage units, non-blocking continue, W425 setup

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chore(tri): update session log and commit count after W424 close-out

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docs(tri): W425 issue + NOW setup (#1374, wave-loop-425)

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docs(tri): correct W425 issue reference to #1374

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merge W424 into W425

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feat(igla): Wave Loop 425 — OSCFSEL 0–7 sweep, PVT worst-case envelope theorems (closes #1374)

Dmitrii Vasilev
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docs(w426): set up Wave Loop 426 current issue (#1376)
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chore(w426): merge wave-loop-425 close-out into W426 branch
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feat(igla): Wave Loop 426 — finite-grid PVT theorems, machine-readable tri fpga JSON, competitor refresh (Variant C)

Dmitrii Vasilev
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