Wave Loop 459 — gen-verilog array parameters from test/invariant/bench + yosys warning gate + ROM style pragma#1434

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Commits on Jul 5, 2026

docs(w426): set up Wave Loop 426 current issue (#1376)
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docs(tri): W425 issue + NOW setup (#1374, wave-loop-425)

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feat(igla): Wave Loop 420 — VCD exact-terminator + real-net auto-threshold, PVT process-corner monotonicity

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docs(now): record W420 PR #1362 and merge-pending status

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docs(issue): set current issue to Wave Loop 421

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feat(igla): Wave Loop 421 — VCD $timescale exact terminator, combined PVT monotonicity, competitor snapshot

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docs(issue): set current issue to Wave Loop 422\n\nCloses #1365\n\nCo-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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feat(igla): Wave Loop 422 — live XC7A200T SRAM boot, Verilog keyword escape, PVT worst-case bound

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docs(issue): set current issue to Wave Loop 423

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feat(igla): Wave Loop 423 — CSV time units, VCD slope filter, PVT worst-case, competitor refresh (Closes #1368)

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setup(igla): Wave Loop 424 branch and issue (#1371)

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feat(igla): Wave Loop 424 — FPGA tooling hardening, PVT context, CSV voltage units, non-blocking continue, W425 setup

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chore(tri): update session log and commit count after W424 close-out

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docs(tri): correct W425 issue reference to #1374

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feat(igla): Wave Loop 425 — OSCFSEL 0–7 sweep, PVT worst-case envelope theorems (closes #1374)

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feat(igla): Wave Loop 426 — finite-grid PVT theorems, machine-readable tri fpga JSON, competitor refresh (Variant C)

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docs(w427): set up current issue for Wave Loop 427 (#1379)
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feat(igla): Wave Loop 427 — per-OSCFSEL PVT envelope theorems, tri fpga sweep-report --json, competitor refresh (Variant C)

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docs(issue): set current issue to Wave Loop 428 (#1383)

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feat(igla): Wave Loop 428 — unified OSCFSEL PVT theorems, tri fpga pvt-envelope --json, competitor refresh

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chore(w429): seed current-issue.md for Wave Loop 429

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feat(igla): Wave Loop 429 — raw-ns OSCFSEL theorems, measured-to-lean --json, W429 report and W430 cooperation (Closes #1385)

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docs: Wave Loop 430 current-issue setup (Refs #1388)

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docs: Wave Loop 429 experience log

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feat(igla): Wave Loop 430 — live XADC readout, PVT-envelope bridge, W431 cooperation\n\n- Add tri fpga read-xadc and --xadc flags on boot-log/cold-por/cclk-sweep.\n- Parse openFPGALoader --read-xad…
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docs(trinity): W431 setup — current issue, NOW, experience (Wave Loop 430 close-out)\n\n- Point .trinity/current-issue.md and docs/NOW.md to W431 (#1389).\n- Add W430 learnings to .trinity/experien…
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feat(igla): Wave Loop 431 — XADC→PVT context bridge, computable envelope, measured-to-lean --json summary hardening

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docs: record PR #1392 in NOW.md and experience.md

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feat(igla): Wave Loop 432 — per-process-corner raw-ns OSCFSEL theorems, master-merge feasibility probe, W432 close-out artifacts

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docs(experience): W432 learnings — per-process-corner theorem, master-merge probe, blocked bench redirect

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feat(igla): Wave Loop 433 — formal bridge fallback, compose W431 XADC envelope with W432 per-corner raw-ns OSCFSEL theorem

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docs(experience): W433 learnings and missing W429-W431 plan files

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feat(igla): Wave Loop 434 — live XADC → PVT context theorem, synthetic CCLK proof-of-pipeline, W435 issue #1398 + branch

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chore(trinity): update current_task counters after W434 verification run

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feat(igla): Wave Loop 435 — live XADC → PVT context CLI export, OSCFSEL 0..7 synthetic theorem matrix, end-to-end integration test

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docs(w435): record PR #1403 in NOW.md
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feat(igla): Wave Loop 436 — live XADC → PVT context in boot logs and sweep reports, closed-vocabulary source labels, quantified combined-check theorem

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chore(w437): update issue references to #1405 after GitHub creation

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chore(now): set W436 PR number to #1406

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feat(igla): Wave Loop 437 — dry-run synthetic XADC→PVT validation, verify-lean gate, public PVT resolver

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chore(now): set W437 PR number to #1408

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chore(w438): update current-issue.md for Wave Loop 438

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feat(w438): integrate synthetic dry-run + verify-lean into FPGA smoke gate

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docs(w438): close-out report, evidence, and W439 cooperation variants

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feat(igla): Wave Loop 439 — wire smoke-gate into tri test, add --json report, regression test

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feat(igla): Wave Loop 440 — consume smoke-gate JSON report, add suite --json summary, harden skip/fail handling, restore 127 active tests (Closes #1411)

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docs(w440): correct issue/PR numbers — W440 PR #1414, W441 issue #1413

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feat(igla): Wave Loop 441 — baseline-aware suite summary, OSCFSEL 0..7 theorem matrix, CI schema tests (Closes #1413)

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docs(w441): add PR #1416 to close-out report (Closes #1413)

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docs(w441): record PR #1416 in NOW.md (Closes #1413)

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feat(igla): Wave Loop 442 — 24-variant ff/tt/ss theorem matrix, smoke-gate schema_version, matrix/schema tests

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docs(w442): note PR/issue numbers to be assigned by GitHub

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feat(igla): Wave Loop 443 — PVT-envelope hardening for the 24-variant theorem matrix

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feat(fpga): W444 fixture replay + elapsed_ms metric
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docs(fpga): W445 evidence + W446 cooperation plan
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feat(fpga): W446 golden fixture report-shape diff gate + replay timing + keyword field-access fix
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feat(igla/fpga): Wave Loop 447 close-out — live-capture fallback, golden-matrix combined-check theorem, standalone measured-to-lean build, W448 cooperation

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feat(igla/fpga): Wave Loop 448 — dry-run-live fixture anchor, standalone Lean smoke gate, adversarial envelope theorem, W449 cooperation

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feat(igla): Wave Loop 449 — golden quantified transaction theorem, standalone-build suite metric, competitor refresh

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Commits on Jul 6, 2026

feat(igla): Wave Loop 450 — dry-run-live quantified transaction theorem, standalone snapshot, --fast suite mode

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feat(igla): Wave Loop 451 — boundary hot/low-v envelope theorem, VCCAUX independence, CI metric hardening, smoke-gate snapshots

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feat(igla): Wave Loop 452 — boundary cold/high-voltage envelope theorem, adversarial VCCINT witness, OSCFSEL range gate, CI smoke-state hardening, all-ok snapshot

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feat(igla): Wave Loop 453 — close four-corner PVT rectangle in Lean, harden smoke-gate JSON schema, refresh competitors

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docs(w454): point current-issue, NOW, and cooperation to W454 issue #1424

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feat(igla): Wave Loop 454 — high-VCCINT adversarial witness, duty-cycle asymmetry, bounded jitter theorems + Rust counterparts; reject master-merge as insufficient; W455 handoff

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docs(experience): W454 learnings — master-merge audit, adversarial/robustness theorems, Variant C pivot

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feat(igla): Wave Loop 455 — clear 7 residual gen-verilog yosys smoke failures by porting tuple/array backend

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docs(reports): W452–W455 competitor boundary refresh in T27_VS_FORMAL_HDL_2026.md
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feat(igla): Wave Loop 456 — ROM read-only enforcement + regression spec

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docs(w456): W456 close-out report, evidence, W457 cooperation plan, NOW/current-issue refresh

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feat(igla): Wave Loop 457 — RAM style pragma support for module-level arrays

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feat(igla): Wave Loop 458 — gen-verilog warning hygiene + module-level array parameters

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feat(igla): Wave Loop 459 — array parameters from test/invariant/bench, yosys warning gate with SIMULATION define, ROM style pragma, 583/583 non-smoke PASS + 63/63 yosys smoke PASS

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docs(w459): record PR #1434 in NOW.md and WAVE_LOOP_459_REPORT.md

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