feat(igla): Wave Loop 425 — OSCFSEL 0–7 sweep, PVT worst-case envelope theorems by gHashTag · Pull Request #1375 · gHashTag/t27

gHashTag · 2026-07-05T07:38:22Z

Wave Loop 425 executes Variant C: the bench remains blocked (P12 unwired, no relay gate), so work focused on formal/tooling hardening.

What changed

cli/tri/src/fpga.rs: default cclk-sweep and smoke-gate dry-run OSCFSEL range expanded from 0–5 to 0–7.
proofs/lean4/Trinity/TernaryFPGABoot.lean: added combined-worst-case envelope theorems pvt_half_ns_worst_case_is_upper_envelope and pvt_low_ns_worst_case_is_upper_envelope; moved OSCFSEL_WORST_CASE_PVT_CONTEXT earlier for proof visibility.
docs/reports/WAVE_LOOP_425_REPORT.md, FPGA_LOOP_EVIDENCE_W425_2026-07-05.md, FPGA_LOOP_COOPERATION_W426_2026-07-05.md.
.trinity/current-issue.md + .trinity/experience.md: W425 close-out and learnings.

Verification

cargo test -p tri: 93/93 PASS
lake build Trinity.TernaryFPGABoot: PASS (2967 jobs)
tri fpga cclk-sweep --dry-run / tri fpga smoke-gate: PASS (8 variants)
./scripts/tri test: parse/typecheck/gen-zig/gen-rust/gen-c/seal-verify PASS; gen-verilog-yosys-smoke 7 failures (pre-existing gen-verilog gen-verilog: 5 lowering defects block iverilog-clean RTL from non-trivial specs #1245 weak points, unchanged)

🤖 Generated with Claude Code

…shold, PVT process-corner monotonicity Closes #1361 Variant C fallback (bench still blocked: P12 unwired, DLC10 cable missing, no relay). Instrument-import depth and formal guarding only. - cli/tri/src/fpga.rs: - exact-token VCD $date/$version/$comment terminator with regression test for embedded $end-like tokens (closes W419 report/actual gap) - real-valued VCD net auto-threshold from observed voltage swing - PVT half-period process-corner monotonicity regression test - proofs/lean4/Trinity/TernaryFPGABoot.lean: - pvt_half_ns_monotone_in_process_corner (ff ≤ tt ≤ ss) - fpga/HARDWARE_SSOT.md: §3.6.17 documenting W420 VCD/PVT improvements - .trinity/experience.md: W420 learnings - docs/reports: W420 report, evidence, and W421 cooperation variants Verification: - cargo test -p tri vcd: 13/13 PASS - cargo test -p tri pvt: 10/10 PASS - cargo test -p tri fpga::tests: 48/48 PASS - lake build Trinity.TernaryFPGABoot: PASS (2967 jobs) - ./scripts/tri test: 16 pre-existing yosys failures (#1245), no new ones Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

Refs: #1362 Closes #1361 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

Closes #1363 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

… PVT monotonicity, competitor snapshot Closes #1363 Variant C fallback (bench still blocked: openFPGALoader --detect reports 0 devices). - cli/tri/src/fpga.rs: - apply vcd_line_ends_with_token to $timescale terminator - add test_parse_vcd_timescale_with_embedded_end_token - add test_parse_vcd_real_auto_threshold_us_timescale - add test_pvt_half_ns_monotone_combined - proofs/lean4/Trinity/TernaryFPGABoot.lean: - add pvt_half_ns_monotone_combined - fpga/HARDWARE_SSOT.md: §3.6.18 documenting W421 improvements - docs/reports/T27_VS_FORMAL_HDL_2026.md: competitor comparison - .trinity/experience.md: W421 learnings - docs/reports: W421 report, evidence, and W422 cooperation variants Verification: - cargo test -p tri vcd: 15/15 PASS - cargo test -p tri pvt: 11/11 PASS - cargo test -p tri fpga::tests: 51/51 PASS - lake build Trinity.TernaryFPGABoot: PASS (2967 jobs) - ./scripts/tri test: 16 pre-existing yosys failures (#1245), no new ones Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

…-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

…escape, PVT worst-case bound Closes #1365 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

Closes #1368 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

…st-case, competitor refresh (Closes #1368) - cli/tri/src/fpga.rs: CSV ms/us/ns/sample-number normalization, VCD real-net slope filter, unknown timescale fallback, dumpoff/dumpon without timestamp, --pvt-worstcase mode; +10 regression tests (60/60 PASS). - fpga/HARDWARE_SSOT.md: add §3.6.20 documenting W423 instrument-import depth. - docs/reports/T27_VS_FORMAL_HDL_2026.md: refresh Sparkle/Verilean, Clash, CIRCT. - docs/reports/WAVE_LOOP_423_REPORT.md, FPGA_LOOP_EVIDENCE_W423_2026-07-05.md, FPGA_LOOP_COOPERATION_W424_2026-07-05.md: W423 close-out + W424 variants. - docs/NOW.md, .trinity/experience.md, .trinity/current-issue.md: W423 close-out and W424 setup. Full sweep: 576 passed, 0 seal mismatches, 7 pre-existing gen-verilog yosys smoke failures, 0 FPGA smoke failures. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

Update .trinity/current-issue.md and cooperation file with the new W424 issue number. Reference #1371 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

…voltage units, non-blocking continue, W425 setup - Add non-blocking wait_for_continue helper for boot-log/cold-por/cclk-sweep - Parse CSV voltage units (v/mv) and scale to volts before threshold detection - Embed optional PVT context + XADC placeholder into boot-log JSON - Expand default CCLK sweep to OSCFSEL 0..7 - Add Lean 4 ProcessCorner decidability/severity helpers - W424 report, evidence, and W425 cooperation variants Closes #1371 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

- Update .trinity/current-issue.md with W425 goal, plan, acceptance criteria - Prepend W424 close-out and W425 setup to docs/NOW.md Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

Closes #1371 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

Closes #1374 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

…e theorems (closes #1374) - cli/tri/src/fpga.rs: expand cclk-sweep/smoke-gate default OSCFSEL range to 0–7 - proofs/lean4/Trinity/TernaryFPGABoot.lean: add pvt_half_ns_worst_case_is_upper_envelope and pvt_low_ns_worst_case_is_upper_envelope; move OSCFSEL_WORST_CASE_PVT_CONTEXT earlier - docs/reports: W425 report, evidence, and W426 cooperation variants - .trinity/current-issue.md + experience.md: W425 close-out learnings - Variant C executed because P12 is still unwired and no relay gate is available Verification: cargo test -p tri PASS, lake build PASS, tri test PASS (7 pre-existing gen-verilog yosys smoke failures unchanged) Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

github-actions · 2026-07-05T07:38:34Z

📓 NotebookLM Notebook linked to this PR

Notebook ID: b83263109fb055dc
URL: https://notebooklm.google.com/notebook/b83263109fb055dc

This notebook contains session context, decisions, and artifacts for this work.

github-actions · 2026-07-05T07:38:35Z

PR Dashboard

Generated at: 2026-07-05 07:38:33 UTC

feat(igla): Wave Loop 425 — OSCFSEL 0–7 sweep, PVT worst-case envelope theorems #1375 feat(igla): Wave Loop 425 — OSCFSEL 0–7 sweep, PVT worst-case envelope theorems | Created: 2026-07-05 | Updated: 2026-07-05 | 12 failing / 16 total
feat(igla): Wave Loop 424 — FPGA tooling hardening, PVT context, CSV voltage units, non-blocking continue, W425 setup #1373 feat(igla): Wave Loop 424 — FPGA tooling hardening, PVT context, CSV voltage units, non-blocking continue, W425 setup | Created: 2026-07-05 | Updated: 2026-07-05 | 4 failing / 26 total
feat(igla): Wave Loop 423 — CSV time units, VCD slope filter, PVT worst-case, competitor refresh #1372 feat(igla): Wave Loop 423 — CSV time units, VCD slope filter, PVT worst-case, competitor refresh | Created: 2026-07-05 | Updated: 2026-07-05 | 3 failing / 27 total
Wave Loop 422 — live XC7A200T SRAM boot, Verilog keyword escape, PVT worst-case bound #1369 Wave Loop 422 — live XC7A200T SRAM boot, Verilog keyword escape, PVT worst-case bound | Created: 2026-07-05 | Updated: 2026-07-05 | 3 failing / 27 total
feat(igla): Wave Loop 421 — VCD $timescale exact terminator, combined PVT monotonicity, competitor snapshot #1364 feat(igla): Wave Loop 421 — VCD $timescale exact terminator, combined PVT monotonicity, competitor snapshot | Created: 2026-07-04 | Updated: 2026-07-04 | 4 failing / 26 total
feat(igla): Wave Loop 420 — VCD exact-terminator + auto-threshold, PVT process-corner monotonicity #1362 feat(igla): Wave Loop 420 — VCD exact-terminator + auto-threshold, PVT process-corner monotonicity | Created: 2026-07-04 | Updated: 2026-07-04 | 3 failing / 25 total
chore(ci)(deps): bump actions/download-artifact from 4 to 8 #1238 chore(ci)(deps): bump actions/download-artifact from 4 to 8 | Created: 2026-07-01 | Updated: 2026-07-01 | 3 failing / 26 total
chore(ci)(deps): bump docker/build-push-action from 6 to 7 #1237 chore(ci)(deps): bump docker/build-push-action from 6 to 7 | Created: 2026-07-01 | Updated: 2026-07-01 | 0 failing / 17 total
chore(ci)(deps): bump actions/upload-artifact from 4 to 7 #1236 chore(ci)(deps): bump actions/upload-artifact from 4 to 7 | Created: 2026-07-01 | Updated: 2026-07-01 | 4 failing / 29 total
chore(deps)(deps): bump uuid from 1.23.2 to 1.23.4 #1227 chore(deps)(deps): bump uuid from 1.23.2 to 1.23.4 | Created: 2026-06-29 | Updated: 2026-06-29 | 3 failing / 25 total
chore(deps)(deps): bump candle-nn from 0.10.2 to 0.11.0 #1226 chore(deps)(deps): bump candle-nn from 0.10.2 to 0.11.0 | Created: 2026-06-29 | Updated: 2026-06-29 | 3 failing / 25 total
docs(metrics): сводка ключевых метрик 83 числовых форматов (SSOT-derived) #1225 docs(metrics): сводка ключевых метрик 83 числовых форматов (SSOT-derived) | Created: 2026-06-28 | Updated: 2026-06-28 | 3 failing / 17 total
chore(deps)(deps): bump tower-http from 0.6.8 to 0.7.0 #1220 chore(deps)(deps): bump tower-http from 0.6.8 to 0.7.0 | Created: 2026-06-22 | Updated: 2026-06-22 | 3 failing / 25 total
conformance: promote gf10/gf256 to bitexact_selfconsistent (WP-34) #1216 conformance: promote gf10/gf256 to bitexact_selfconsistent (WP-34) | Created: 2026-06-19 | Updated: 2026-06-19 | 0 failing / 19 total
chore(deps)(deps): bump ignore from 0.4.25 to 0.4.26 #1145 chore(deps)(deps): bump ignore from 0.4.25 to 0.4.26 | Created: 2026-06-15 | Updated: 2026-06-15 | 1 failing / 25 total
chore(deps)(deps): bump regex from 1.12.3 to 1.12.4 #1143 chore(deps)(deps): bump regex from 1.12.3 to 1.12.4 | Created: 2026-06-15 | Updated: 2026-06-15 | 1 failing / 25 total
conformance(gf14): add 14 bit-exact GF14 vectors (52 -> 53) #1142 conformance(gf14): add 14 bit-exact GF14 vectors (52 -> 53) | Created: 2026-06-15 | Updated: 2026-06-15 | 0 failing / 19 total
ci(trust): OpenSSF Scorecard + SBOM + Sigstore signed releases #1141 ci(trust): OpenSSF Scorecard + SBOM + Sigstore signed releases | Created: 2026-06-15 | Updated: 2026-06-15 | 3 failing / 17 total
fix(gen): untrack stale gen/numeric catalog artifacts (committed gen drifts 77 vs SSOT 83) -- Closes #1120 #1128 fix(gen): untrack stale gen/numeric catalog artifacts (committed gen drifts 77 vs SSOT 83) -- Closes #1120 | Created: 2026-06-14 | Updated: 2026-06-14 | 0 failing / 21 total

Summary

Status	Count
Total Open PRs	19
PRs with Failing Checks	14
PRs with All Checks Green	5
READY	4
FAILING	14
PENDING	0

Seal Status

⚠️ STALE -- sha256(compiler.rs)=2034a5f9760b != manifest seal=49e55df6d444.
The committed NMSE numbers were certified against an older compiler.rs.
Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

Inherit W425 changes (PR #1375, closes #1374) so W426 work builds on the OSCFSEL 0–7 sweep and PVT worst-case envelope theorems. [ref: #1374]

gHashTag · 2026-07-06T14:47:45Z

Closing: stale wave-loop-4xx PR, superseded by later waves. Reopen if still relevant.

Dmitrii Vasilev and others added 15 commits July 5, 2026 02:27

docs(now): record W420 PR #1362 and merge-pending status

7d8bae0

Refs: #1362 Closes #1361 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

docs(issue): set current issue to Wave Loop 421

5fe9fe4

Closes #1363 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

docs(issue): set current issue to Wave Loop 422\n\nCloses #1365\n\nCo…

0fa33e3

…-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

feat(igla): Wave Loop 422 — live XC7A200T SRAM boot, Verilog keyword …

95f9ba7

…escape, PVT worst-case bound Closes #1365 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

docs(issue): set current issue to Wave Loop 423

ea3e32e

Closes #1368 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

setup(igla): Wave Loop 424 branch and issue (#1371)

d746f9d

Update .trinity/current-issue.md and cooperation file with the new W424 issue number. Reference #1371 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

chore(tri): update session log and commit count after W424 close-out

59faa4b

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

docs(tri): W425 issue + NOW setup (#1374, wave-loop-425)

0baae16

- Update .trinity/current-issue.md with W425 goal, plan, acceptance criteria - Prepend W424 close-out and W425 setup to docs/NOW.md Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

docs(tri): correct W425 issue reference to #1374

3960166

Closes #1371 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

merge W424 into W425

555ef7b

Closes #1374 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

github-actions Bot mentioned this pull request Jul 5, 2026

conformance: promote gf128 selfconsistent -> strict SW-bitexact (72/3/8) #1377

Merged

gHashTag pushed a commit that referenced this pull request Jul 5, 2026

chore(w426): merge wave-loop-425 close-out into W426 branch

a93aad5

Inherit W425 changes (PR #1375, closes #1374) so W426 work builds on the OSCFSEL 0–7 sweep and PVT worst-case envelope theorems. [ref: #1374]

gHashTag closed this Jul 6, 2026

gHashTag reopened this Jul 6, 2026

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feat(igla): Wave Loop 425 — OSCFSEL 0–7 sweep, PVT worst-case envelope theorems#1375

feat(igla): Wave Loop 425 — OSCFSEL 0–7 sweep, PVT worst-case envelope theorems#1375
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