EPIC: 83-Format Catalog × openXC7 Silicon Proof
Current Honest Status (updated 2026-07-14, Wave 15)
| Metric |
Count |
Detail |
| SW oracle coverage |
72/83 |
12 *_ref.py modules, all self-tests PASS |
| Committed JSON vectors |
~9/83 |
50 files in conformance/vectors/ |
| Decode-HW Tier-E |
~50-55 formats |
UART 4/4 on AX7203 (see comments for per-format proofs) |
| Compute-HW Tier-E |
10 GF formats × {ADD,MUL} |
GF4-GF32, 0 failures on silicon |
| GF64 ADD |
70.1% (359/512) |
timing closure ceiling (CFGMCLK), iverilog 9/9 |
| DIV/SQRT |
binary32 proxy |
NOT bit-exact, documented |
| Unique Tier-E formats (decode ∪ compute) |
~49-55/83 |
NOT 71 (that was double-counted cells) |
Key corrections (from audit waves 5-14)
- "71/83" was WRONG: double-counted decode+compute cells as unique formats
- "11392/11392" was FABRICATED: table sums to 11976, no artifact contains it
- "4-11x lower LUT" was FALSE: measured 0.85x (GF16=491 LUT vs tekum16=573)
- takum64 truncated routing claim was FALSE: CI failed all 8 seeds
- div/sqrt are binary32 proxies, NOT native GF computation
What IS proven
- 10 GF formats (GF4-GF32) × {ADD,MUL} bit-exact on openXC7 silicon
- ~50+ decode cells bit-exact on AX7203 (IDCODE 0x13636093)
- 72 formats with exact Fraction oracle (verified by cross-validation)
- LUT measurement reproducible from clean clone (
make lut → 491 LUT)
- Paper PDF compiled (314KB, arXiv-ready)
Live discussion in comments (208+)
See comments for per-format Tier-E proofs, silicon UART logs, and wave reports.
EPIC: 83-Format Catalog × openXC7 Silicon Proof
Current Honest Status (updated 2026-07-14, Wave 15)
*_ref.pymodules, all self-tests PASSKey corrections (from audit waves 5-14)
What IS proven
make lut→ 491 LUT)Live discussion in comments (208+)
See comments for per-format Tier-E proofs, silicon UART logs, and wave reports.