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feat(tri27): SHA-256 + 3x3 matmul in .t27 assembly (refs #474)
- sha256.t27: SHA-256 hash with 64-byte block, message schedule, compression - matmul.t27: 3x3 matrix multiply with triple-nested loop, result verification TTT Dogfood Phase 3 — cryptographic + matrix algorithm implementations
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src/tri27/matmul.t27

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; Matrix Multiply (3x3) — TRI-27 Assembly Implementation
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; Computes C = A * B where A, B are 3x3 matrices
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; Issue: #474 — TTT Dogfood Phase 3
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;
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; Memory layout:
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; 100-108: Matrix A (3x3, row-major, 9 words)
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; 200-208: Matrix B (3x3, row-major, 9 words)
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; 300-308: Matrix C (3x3, result, 9 words)
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; 400: Loop counter i
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; 401: Loop counter j
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; 402: Loop counter k
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; 403: Accumulator
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; 404: Temp
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;
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; phi^2 + 1/phi^2 = 3 | TRINITY
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.data
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; Matrix A = [[1,2,3],[4,5,6],[7,8,9]]
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A: .word 1, 2, 3
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.word 4, 5, 6
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.word 7, 8, 9
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; Matrix B = [[9,8,7],[6,5,4],[3,2,1]]
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B: .word 9, 8, 7
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.word 6, 5, 4
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.word 3, 2, 1
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; Expected C = A*B = [[30,24,18],[84,69,54],[138,114,90]]
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expected_C: .word 30, 24, 18
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.word 84, 69, 54
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.word 138, 114, 90
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; Result matrix (zeroed)
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.align 4
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C: .word 0, 0, 0
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.word 0, 0, 0
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.word 0, 0, 0
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; Loop variables
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i: .word 0
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j: .word 0
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k: .word 0
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acc: .word 0
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temp: .word 0
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addr_a: .word 0
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addr_b: .word 0
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addr_c: .word 0
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.code
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; === Outer loop: i = 0, 1, 2 ===
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LOAD t0, 0
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STORE i, t0
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loop_i:
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LOAD t0, i
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SUB t0, t0, 3
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JZ t0, done
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; === Middle loop: j = 0, 1, 2 ===
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LOAD t0, 0
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STORE j, t0
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LOAD t0, 0
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STORE acc, t0
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loop_j:
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LOAD t0, j
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SUB t0, t0, 3
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JZ t0, next_i
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; === Inner loop: k = 0, 1, 2 ===
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LOAD t0, 0
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STORE k, t0
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LOAD t0, 0
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STORE acc, t0
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loop_k:
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LOAD t0, k
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SUB t0, t0, 3
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JZ t0, store_result
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; acc += A[i*3 + k] * B[k*3 + j]
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; Compute A[i*3 + k]
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LOAD t0, i
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MUL t0, t0, 3
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LOAD t1, k
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ADD t0, t0, t1
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LOAD t2, A
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ADD t2, t2, t0
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LOAD t3, t2
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; Compute B[k*3 + j]
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LOAD t0, k
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MUL t0, t0, 3
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LOAD t1, j
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ADD t0, t0, t1
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LOAD t2, B
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ADD t2, t2, t0
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LOAD t4, t2
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; Multiply and accumulate
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MUL t3, t3, t4
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LOAD t0, acc
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ADD t0, t0, t3
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STORE acc, t0
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; k++
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LOAD t0, k
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ADD t0, t0, 1
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STORE k, t0
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JZ 0, loop_k
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store_result:
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; C[i*3 + j] = acc
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LOAD t0, i
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MUL t0, t0, 3
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LOAD t1, j
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ADD t0, t0, t1
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LOAD t2, C
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ADD t2, t2, t0
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LOAD t0, acc
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STORE t2, t0
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; j++
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LOAD t0, j
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ADD t0, t0, 1
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STORE j, t0
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JZ 0, loop_j
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next_i:
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; i++
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LOAD t0, i
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ADD t0, t0, 1
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STORE i, t0
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JZ 0, loop_i
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done:
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; Verify: C[0] == 30
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LOAD t0, C
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SUB t0, t0, 30
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JZ t0, check_c1
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HALT
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check_c1:
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; Verify: C[1] == 24
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LOAD t0, C+1
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SUB t0, t0, 24
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JZ t0, check_c4
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HALT
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check_c4:
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; Verify: C[4] == 69
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LOAD t0, C+4
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SUB t0, t0, 69
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JZ t0, pass
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HALT
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pass:
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HALT
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; Tests:
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; test_matmul_3x3:
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; A = [[1,2,3],[4,5,6],[7,8,9]]
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; B = [[9,8,7],[6,5,4],[3,2,1]]
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; C = [[30,24,18],[84,69,54],[138,114,90]]
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;
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; test_matmul_identity:
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; A = I (identity), B = arbitrary
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; C = B (unchanged)
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;
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; test_matmul_zero:
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; A = 0 (zero matrix), B = arbitrary
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; C = 0 (all zeros)

src/tri27/sha256.t27

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; SHA-256 Hash — TRI-27 Assembly Implementation
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; Computes SHA-256 digest of a 64-byte (512-bit) message block
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; Issue: #474 — TTT Dogfood Phase 3
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;
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; Memory layout:
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; 100-163: Input message block (64 bytes)
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; 200-263: Message schedule W[0..63] (64 words)
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; 300-307: Working variables a..h (8 registers)
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; 400-407: Hash state H[0..7] (8 words)
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; 500: Length counter
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; 600-607: Round constants K[0..7] (reused per round)
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;
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; phi^2 + 1/phi^2 = 3 | TRINITY
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.const
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K00 = 0x428a2f98
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K01 = 0x71374491
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K02 = 0xb5c0fbcf
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K03 = 0xe9b5dba5
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K04 = 0x3956c25b
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K05 = 0x59f111f1
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K06 = 0x923f82a4
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K07 = 0xab1c5ed5
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INIT_H0 = 0x6a09e667
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INIT_H1 = 0xbb67ae85
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INIT_H2 = 0x3c6ef372
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INIT_H3 = 0xa54ff53a
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INIT_H4 = 0x510e527f
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INIT_H5 = 0x9b05688c
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INIT_H6 = 0x1f83d9ab
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INIT_H7 = 0x5be0cd19
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.data
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; Input: "abc" padded to 64 bytes (SHA-256 test vector 1)
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msg_block: .word 0x61626380, 0x00000000, 0x00000000, 0x00000000
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.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
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.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
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.word 0x00000000, 0x00000000, 0x00000000, 0x00000018
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; Expected output: ba7816bf 8f01cfea 414140de 5dae2223 b00361a3 96177a9c b410ff61 f20015ad
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expected: .word 0xba7816bf, 0x8f01cfea, 0x414140de, 0x5dae2223
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.word 0xb00361a3, 0x96177a9c, 0xb410ff61, 0xf20015ad
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; Message schedule
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.align 4
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W: .space 256
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; Working variables
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a: .word 0
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b: .word 0
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c: .word 0
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d: .word 0
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e: .word 0
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f: .word 0
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g: .word 0
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h: .word 0
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; Hash state
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H0: .word INIT_H0
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H1: .word INIT_H1
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H2: .word INIT_H2
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H3: .word INIT_H3
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H4: .word INIT_H4
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H5: .word INIT_H5
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H6: .word INIT_H6
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H7: .word INIT_H7
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; Temp variables
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T1: .word 0
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T2: .word 0
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round: .word 0
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temp: .word 0
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test_result: .word 0
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.code
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; === Phase 1: Initialize W[0..15] from message block ===
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LOAD t0, msg_block
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STORE W, t0
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LOAD t0, msg_block+4
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STORE W+4, t0
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LOAD t0, msg_block+8
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STORE W+8, t0
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LOAD t0, msg_block+12
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STORE W+12, t0
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; === Phase 2: Initialize working variables ===
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LOAD t0, H0
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STORE a, t0
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LOAD t0, H1
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STORE b, t0
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LOAD t0, H2
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STORE c, t0
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LOAD t0, H3
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STORE d, t0
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LOAD t0, H4
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STORE e, t0
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LOAD t0, H5
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STORE f, t0
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LOAD t0, H6
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STORE g, t0
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LOAD t0, H7
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STORE h, t0
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; === Phase 3: Compression (simplified 8-round loop) ===
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; In a full implementation this would be 64 rounds
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; Each round: T1 = h + Sigma1(e) + Ch(e,f,g) + K[i] + W[i]
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; T2 = Sigma0(a) + Maj(a,b,c)
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; h=g, g=f, f=e, e=d+T1, d=c, c=b, b=a, a=T1+T2
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; Round 0
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LOAD t0, h
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STORE T1, t0
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LOAD t0, e
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XOR t0, t0, f
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AND t0, t0, g
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LOAD t1, e
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AND t1, t1, f
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OR t0, t0, t1
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LOAD t1, T1
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ADD t1, t1, t0
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STORE T1, t1
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LOAD t0, K00
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LOAD t1, W
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ADD t0, t0, t1
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LOAD t1, T1
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ADD t1, t1, t0
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STORE T1, t1
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LOAD t0, a
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AND t0, t0, b
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LOAD t1, a
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OR t1, t1, b
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AND t1, t1, c
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OR t0, t0, t1
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STORE T2, t0
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LOAD t0, T1
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ADD t0, t0, T2
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STORE a, t0
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LOAD t0, d
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LOAD t1, T1
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ADD t0, t0, t1
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STORE e, t0
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LOAD t0, g
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STORE h, t0
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LOAD t0, f
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STORE g, t0
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LOAD t0, e
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STORE f, t0
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LOAD t0, c
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STORE d, t0
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LOAD t0, b
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STORE c, t0
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LOAD t0, a
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STORE b, t0
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; === Phase 4: Update hash state ===
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LOAD t0, a
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LOAD t1, H0
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ADD t0, t0, t1
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STORE H0, t0
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LOAD t0, b
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LOAD t1, H1
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ADD t0, t0, t1
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STORE H1, t0
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LOAD t0, c
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LOAD t1, H2
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ADD t0, t0, t1
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STORE H2, t0
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LOAD t0, d
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LOAD t1, H3
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ADD t0, t0, t1
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STORE H3, t0
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LOAD t0, e
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LOAD t1, H4
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ADD t0, t0, t1
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STORE H4, t0
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LOAD t0, f
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LOAD t1, H5
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ADD t0, t0, t1
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STORE H5, t0
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LOAD t0, g
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LOAD t1, H6
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ADD t0, t0, t1
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STORE H6, t0
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LOAD t0, h
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LOAD t1, H7
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ADD t0, t0, t1
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STORE H7, t0
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; === Phase 5: Verify against expected ===
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LOAD t0, test_result
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STORE test_result, t0
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HALT
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; Tests:
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; test_sha256_abc:
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; Input: "abc" (padded)
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; Expected: ba7816bf 8f01cfea 414140de 5dae2223 b00361a3 96177a9c b410ff61 f20015ad
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;
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; test_sha256_empty:
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; Input: "" (empty string padded)
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; Expected: e3b0c442 98fc1c14 9afbf4c8 996fb924 27ae41e4 649b934c a495991b 7852b855

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