feat(hslm): Patch #5 - AVX2 32-wide adaptive SIMD

Integrate simd_config.zig into f16_utils.zig and sparse_simd.zig for
adaptive vector width based on CPU feature detection:

**f16_utils.zig changes:**
- Replace hardcoded VEC_F16_SIZE=16 with adaptive simd_config.capabilities.optimal_f16_width
- VecF16, VecF32 types now use comptime-known width from CPU detection
- AVX2: 32-wide f16 (2× throughput vs 16-wide)
- NEON: 16-wide f16
- Fallback: 8-wide f16
- All 33 tests pass + 7 fuzz tests

**sparse_simd.zig changes:**
- Use @min(VEC_I8_SIZE, VEC_F16_SIZE) for consistent chunk size
- Handles mismatched i8/f16 vector sizes across architectures
- All 23 tests pass

Closes #297 (AVX2 32-wide vectors) - reanimation of PR #298
Patch #5 of 7 SIMD optimizations

Author: Antigravity Agent