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| 1 | +// ═════════════════════════════════════════════════════════════════════════════ |
| 2 | +// GF16 MAC-16 TESTBENCH — Functional Verification (BENCH-006) |
| 3 | +// ═════════════════════════════════════════════════════════════════════════════ |
| 4 | +// |
| 5 | +// Test vectors: |
| 6 | +// 1. Zero inputs → zero output |
| 7 | +// 2. All weights = 1, all inputs = 1 → sum = 16 |
| 8 | +// 3. All weights = -1, all inputs = 1 → sum = -16 |
| 9 | +// 4. Sparse vectors (mostly zeros) |
| 10 | +// 5. Random vectors (compare with CPU reference) |
| 11 | +// |
| 12 | +// Usage: |
| 13 | +// iverilog -o gf16_mac_16_tb gf16_mac_16_top.v gf16_mac_16_tb.v |
| 14 | +// vvp gf16_mac_16_tb |
| 15 | +// |
| 16 | +// φ² + 1/φ² = 3 = TRINITY |
| 17 | +// ═════════════════════════════════════════════════════════════════════════════ |
| 18 | + |
| 19 | +`default_nettype none |
| 20 | +`timescale 1ns/1ps |
| 21 | + |
| 22 | +module gf16_mac_16_tb; |
| 23 | + |
| 24 | + // ======================================================================== |
| 25 | + // DUT SIGNALS |
| 26 | + // ======================================================================== |
| 27 | + reg clk; |
| 28 | + reg rst_n; |
| 29 | + reg valid; |
| 30 | + reg [255:0] w; |
| 31 | + reg [255:0] x; |
| 32 | + wire ready; |
| 33 | + wire [15:0] y; |
| 34 | + wire overflow; |
| 35 | + |
| 36 | + // ======================================================================== |
| 37 | + // CLK GENERATION (10ns = 100MHz) |
| 38 | + // ======================================================================== |
| 39 | + initial clk = 0; |
| 40 | + always #5 clk = ~clk; |
| 41 | + |
| 42 | + // ======================================================================== |
| 43 | + // GF16 ENCODING HELPERS (1:5:10 format, bias=15) |
| 44 | + // ======================================================================== |
| 45 | + // Value = (-1)^sign × 2^(exp-15) × (1.mantissa) |
| 46 | + // Simple helper: encode signed integer to GF16 |
| 47 | + |
| 48 | + function [15:0] enc_gf16; |
| 49 | + input signed [15:0] val; |
| 50 | + begin |
| 51 | + if (val == 0) |
| 52 | + enc_gf16 = 16'h0000; |
| 53 | + else if (val > 0) |
| 54 | + enc_gf16 = {1'b0, 5'd15, val[8:0]}; // Simplified: exp=bias |
| 55 | + else |
| 56 | + enc_gf16 = {1'b1, 5'd15, -val[8:0]}; // Simplified: exp=bias |
| 57 | + end |
| 58 | + endfunction |
| 59 | + |
| 60 | + // ======================================================================== |
| 61 | + // TASK: apply test vector |
| 62 | + // ======================================================================== |
| 63 | + task apply_vector; |
| 64 | + input [255:0] w_vec; |
| 65 | + input [255:0] x_vec; |
| 66 | + input [100*8:1] name; |
| 67 | + begin |
| 68 | + $display("=== TEST: %s ===", name); |
| 69 | + w = w_vec; |
| 70 | + x = x_vec; |
| 71 | + valid = 1; |
| 72 | + @(posedge clk); |
| 73 | + valid = 0; |
| 74 | + @(posedge clk); |
| 75 | + if (ready) begin |
| 76 | + $display(" y = 0x%04h (overflow=%b)", y, overflow); |
| 77 | + end |
| 78 | + @(posedge clk); |
| 79 | + end |
| 80 | + endtask |
| 81 | + |
| 82 | + // ======================================================================== |
| 83 | + // MAIN TEST SEQUENCE |
| 84 | + // ======================================================================== |
| 85 | + integer test_count; |
| 86 | + integer passed; |
| 87 | + |
| 88 | + initial begin |
| 89 | + // Initialize |
| 90 | + clk = 0; |
| 91 | + rst_n = 0; |
| 92 | + valid = 0; |
| 93 | + w = 256'h0; |
| 94 | + x = 256'h0; |
| 95 | + test_count = 0; |
| 96 | + passed = 0; |
| 97 | + |
| 98 | + // Reset |
| 99 | + #20 rst_n = 1; |
| 100 | + #10; |
| 101 | + |
| 102 | + $display("\n╔══════════════════════════════════════════════════════════════╗"); |
| 103 | + $display("║ GF16 MAC-16 TESTBENCH — BENCH-006 ║"); |
| 104 | + $display("╚══════════════════════════════════════════════════════════════╝\n"); |
| 105 | + |
| 106 | + // ---------------------------------------------------------------------- |
| 107 | + // TEST 1: Zero inputs → zero output |
| 108 | + // ---------------------------------------------------------------------- |
| 109 | + apply_vector(256'h0, 256'h0, "Zero inputs"); |
| 110 | + if (y == 16'h0000) begin |
| 111 | + $display(" ✓ PASS: zero output"); |
| 112 | + passed = passed + 1; |
| 113 | + end else begin |
| 114 | + $display(" ✗ FAIL: expected 0x0000, got 0x%04h", y); |
| 115 | + end |
| 116 | + test_count = test_count + 1; |
| 117 | + |
| 118 | + // ---------------------------------------------------------------------- |
| 119 | + // TEST 2: All ones → sum = 16 |
| 120 | + // ---------------------------------------------------------------------- |
| 121 | + begin |
| 122 | + reg [255:0] ones_vec; |
| 123 | + integer j; |
| 124 | + for (j = 0; j < 16; j = j + 1) begin |
| 125 | + ones_vec[16*j +: 16] = enc_gf16(16'sd1); |
| 126 | + end |
| 127 | + apply_vector(ones_vec, ones_vec, "All ones (1×1 × 16 = 16)"); |
| 128 | + // Expected: y ≈ 16 (in GF16 format) |
| 129 | + if (y[14:0] != 15'h0000) begin |
| 130 | + $display(" ✓ PASS: non-zero output"); |
| 131 | + passed = passed + 1; |
| 132 | + end |
| 133 | + end |
| 134 | + test_count = test_count + 1; |
| 135 | + |
| 136 | + // ---------------------------------------------------------------------- |
| 137 | + // TEST 3: Weights = +1, Inputs = -1 → sum = -16 |
| 138 | + // ---------------------------------------------------------------------- |
| 139 | + begin |
| 140 | + reg [255:0] w_ones, x_minus; |
| 141 | + integer j; |
| 142 | + for (j = 0; j < 16; j = j + 1) begin |
| 143 | + w_ones[16*j +: 16] = enc_gf16(16'sd1); |
| 144 | + x_minus[16*j +: 16] = enc_gf16(-16'sd1); |
| 145 | + end |
| 146 | + apply_vector(w_ones, x_minus, "1 × (-1) × 16 = -16"); |
| 147 | + end |
| 148 | + test_count = test_count + 1; |
| 149 | + |
| 150 | + // ---------------------------------------------------------------------- |
| 151 | + // TEST 4: Sparse (only one non-zero) |
| 152 | + // ---------------------------------------------------------------------- |
| 153 | + begin |
| 154 | + reg [255:0] sparse_w, sparse_x; |
| 155 | + integer j; |
| 156 | + sparse_w = 256'h0; |
| 157 | + sparse_x = 256'h0; |
| 158 | + sparse_w[0 +: 16] = enc_gf16(16'sd5); // w[0] = 5 |
| 159 | + sparse_x[0 +: 16] = enc_gf16(16'sd3); // x[0] = 3 |
| 160 | + // Expected: 5 × 3 = 15 |
| 161 | + apply_vector(sparse_w, sparse_x, "Sparse: 5×3 = 15"); |
| 162 | + end |
| 163 | + test_count = test_count + 1; |
| 164 | + |
| 165 | + // ---------------------------------------------------------------------- |
| 166 | + // TEST 5: Alternating signs |
| 167 | + // ---------------------------------------------------------------------- |
| 168 | + begin |
| 169 | + reg [255:0] w_alt, x_alt; |
| 170 | + integer j; |
| 171 | + for (j = 0; j < 16; j = j + 1) begin |
| 172 | + if (j[0]) begin // Odd indices |
| 173 | + w_alt[16*j +: 16] = enc_gf16(-16'sd1); |
| 174 | + x_alt[16*j +: 16] = enc_gf16(16'sd1); |
| 175 | + end else begin // Even indices |
| 176 | + w_alt[16*j +: 16] = enc_gf16(16'sd1); |
| 177 | + x_alt[16*j +: 16] = enc_gf16(16'sd1); |
| 178 | + end |
| 179 | + end |
| 180 | + apply_vector(w_alt, x_alt, "Alternating signs"); |
| 181 | + end |
| 182 | + test_count = test_count + 1; |
| 183 | + |
| 184 | + // ---------------------------------------------------------------------- |
| 185 | + // SUMMARY |
| 186 | + // ---------------------------------------------------------------------- |
| 187 | + #20; |
| 188 | + $display("\n╔══════════════════════════════════════════════════════════════╗"); |
| 189 | + $display("║ TEST SUMMARY: %0d/%0d passed ║", passed, test_count); |
| 190 | + $display("╚══════════════════════════════════════════════════════════════╝\n"); |
| 191 | + |
| 192 | + if (passed == test_count) |
| 193 | + $display("✓ ALL TESTS PASSED\n"); |
| 194 | + else |
| 195 | + $display("✗ SOME TESTS FAILED\n"); |
| 196 | + |
| 197 | + $finish; |
| 198 | + end |
| 199 | + |
| 200 | + // ======================================================================== |
| 201 | + // TIMEOUT WATCHDOG |
| 202 | + // ======================================================================== |
| 203 | + initial begin |
| 204 | + #100000 $display("✗ ERROR: timeout"); |
| 205 | + $finish; |
| 206 | + end |
| 207 | + |
| 208 | + // ======================================================================== |
| 209 | + // DUT INSTANTIATION |
| 210 | + // ======================================================================== |
| 211 | + gf16_mac_16_top #( |
| 212 | + .LATENCY(2) |
| 213 | + ) dut ( |
| 214 | + .clk(clk), |
| 215 | + .rst_n(rst_n), |
| 216 | + .valid(valid), |
| 217 | + .w(w), |
| 218 | + .x(x), |
| 219 | + .ready(ready), |
| 220 | + .y(y), |
| 221 | + .overflow(overflow) |
| 222 | + ); |
| 223 | + |
| 224 | +endmodule |
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