@@ -210,8 +210,8 @@ been emitted. This means:
210210 • I2S-MUX: BEFORE (drain) + AFTER (dir change alone in buffer) = deterministic
211211
212212Special case for I2S-MUX:
213- • BEFORE: 500us pause ensures buffer fully drained
214- • AFTER: dir change command 500us ensures it's alone in new buffer
213+ • BEFORE: I2S_BLOCK_TICKS pause ensures buffer fully drained
214+ • AFTER: dir change command >= I2S_BLOCK_TICKS ensures it's alone in new buffer
215215 • Bit mask change happens at clean buffer boundary
216216```
217217
@@ -250,12 +250,12 @@ public:
250250 // Return required pause ticks BEFORE direction change
251251 // Used by addQueueEntry to insert sufficient pause for buffered platforms
252252 // Returns 0 for non-buffered platforms (AVR, SAM, MCPWM)
253- // Returns ~ 500us for I2S-MUX (buffer must be empty before mask change)
253+ // Returns I2S_BLOCK_TICKS for I2S-MUX (buffer must be empty before mask change)
254254 uint16_t getDrainPauseTicksForDirChange();
255255
256256 // Return minimum ticks for direction change command itself (I2S-MUX only)
257257 // This is the AFTER pause - ensures dir change is alone in buffer
258- // Returns 0 for all platforms except I2S-MUX
258+ // Returns 0 for all platforms except I2S-MUX (returns I2S_BLOCK_TICKS)
259259 uint16_t getDirChangeMinTicks();
260260
261261 // Optional: Check if pulses are still being emitted
@@ -303,10 +303,10 @@ FastAccelStepper::addQueueEntry(cmd, start):
303303
304304 b. Else if I2S-MUX direction pin (I2S controls both step and dir):
305305 - Query: pause_ticks = getDrainPauseTicksForDirChange()
306- - Insert pause command with pause_ticks (BEFORE: 500us to drain buffer)
306+ - Insert pause command with pause_ticks (BEFORE: I2S_BLOCK_TICKS to drain buffer)
307307 - If queue too full: return AQE_DIR_PIN_IS_BUSY
308308 - Set toggle_dir = 1 in entry
309- - Override entry.ticks = max(entry.ticks, DIR_CHANGE_MIN_TICKS) (AFTER: 500us ensures dir change is alone in buffer)
309+ - Override entry.ticks = max(entry.ticks, getDirChangeMinTicks()) (AFTER: ensures dir change alone in buffer)
310310
311311 c. Else (GPIO direction pin, RMT/MCPWM/AVR/SAM):
312312 - Query: pause_ticks = getDrainPauseTicksForDirChange()
@@ -352,16 +352,16 @@ uint16_t StepperQueue::getDrainPauseTicksForDirChange() {
352352}
353353
354354// ESP32 I2S-MUX (I2S controls both step and dir) - need BEFORE and AFTER pauses
355- // BEFORE: 500us pause to drain buffer completely
356- // AFTER: dir change command itself needs 500us to ensure it's alone in new buffer
355+ // BEFORE: I2S_BLOCK_TICKS pause to drain buffer completely
356+ // AFTER: dir change command itself needs >= I2S_BLOCK_TICKS to be alone in new buffer
357357// The bit mask for direction is only applied when buffer is empty
358358uint16_t StepperQueue::getDrainPauseTicksForDirChange () {
359- return I2S_MUX_DIR_CHANGE_PAUSE_TICKS; // ~500us
359+ return I2S_BLOCK_TICKS;
360360}
361361
362362// Minimum ticks for a direction change command in I2S-MUX mode
363363uint16_t StepperQueue::getDirChangeMinTicks () {
364- return I2S_MUX_DIR_CHANGE_MIN_TICKS; // ~500us
364+ return I2S_BLOCK_TICKS;
365365}
366366```
367367
@@ -387,9 +387,9 @@ uint16_t StepperQueue::getDrainPauseTicksForDirChange() {
387387 // RMT: one command fills one buffer half
388388 return MIN_CMD_TICKS;
389389#elif defined(USE_I2S)
390- // I2S-MUX: 500us BEFORE pause to drain buffer
390+ // I2S-MUX: I2S_BLOCK_TICKS BEFORE pause to drain buffer
391391 // Direction bit mask is only applied when buffer is empty
392- return usToTicks(I2S_MUX_DIR_CHANGE_PAUSE_US); // 500us
392+ return I2S_BLOCK_TICKS;
393393#else
394394 // MCPWM: no buffer, no pause needed
395395 return 0;
@@ -398,9 +398,9 @@ uint16_t StepperQueue::getDrainPauseTicksForDirChange() {
398398
399399uint16_t StepperQueue::getDirChangeMinTicks() {
400400#if defined(USE_I2S)
401- // I2S-MUX: dir change command needs 500us to be alone in buffer
401+ // I2S-MUX: dir change command needs I2S_BLOCK_TICKS to be alone in buffer
402402 // This is the AFTER pause, combined with the direction change
403- return usToTicks(I2S_MUX_DIR_CHANGE_MIN_US); // 500us
403+ return I2S_BLOCK_TICKS;
404404#else
405405 return 0;
406406#endif
@@ -416,17 +416,17 @@ Timeline for I2S-MUX direction change:
416416┌─────────────────────────────────────────────────────────────────┐
417417│ Buffer N: [ Step A] [ Step A ] [ Step A] [ Step A ] (old direction) │
418418│ │
419- │ ─── BEFORE pause (500us ) ─── │
419+ │ ─── BEFORE pause (I2S_BLOCK_TICKS ) ─── │
420420│ │
421- │ Buffer N+1: [ Dir Change Only - 500us ] ← new bit mask applied │
422- │ (no steps, just direction change) │
421+ │ Buffer N+1: [ Dir Change Only] ← new bit mask applied │
422+ │ (>= I2S_BLOCK_TICKS, no steps, just direction) │
423423│ │
424424│ Buffer N+2: [ Step B] [ Step B ] [ Step B] (new direction) │
425425└─────────────────────────────────────────────────────────────────┘
426426
427427Requirements:
428- 1 . BEFORE: 500us pause ensures Buffer N is fully transmitted
429- 2 . AFTER: Dir change command is 500us , ensuring it fills Buffer N+1 alone
428+ 1 . BEFORE: I2S_BLOCK_TICKS pause ensures Buffer N is fully transmitted
429+ 2 . AFTER: Dir change command >= I2S_BLOCK_TICKS , ensuring it fills Buffer N+1 alone
4304303 . New bit mask (direction) is applied at Buffer N+1 boundary
4314314 . Next steps (Buffer N+2) use the new direction
432432```
@@ -659,8 +659,8 @@ if (toggle_dir) {
659659```
660660
661661With the new approach:
662- - ` addQueueEntry() ` inserts ** BEFORE pause** (500us ) to drain buffer completely
663- - Direction change command has ** AFTER duration** (500us ) ensuring it's alone in new buffer
662+ - ` addQueueEntry() ` inserts ** BEFORE pause** (I2S_BLOCK_TICKS ) to drain buffer completely
663+ - Direction change command has ** AFTER duration** (>= I2S_BLOCK_TICKS ) ensuring it's alone in new buffer
664664- Bit mask change happens at buffer boundary - deterministic
665665- ** No synchronization logic needed**
666666- ** I2S driver code unchanged**
@@ -671,9 +671,9 @@ Before (ambiguous):
671671 ↑ When does mask change?
672672
673673After (deterministic):
674- [Step][Step][Step] | PAUSE | [DIR_CHANGE] | [Step][Step]
675- ↑ 500us ↑ 500us
676- buffer empty mask applied at boundary
674+ [Step][Step][Step] | PAUSE (I2S_BLOCK_TICKS) | [DIR_CHANGE] | [Step][Step]
675+ ← buffer empty → ← alone →
676+ mask applied at buffer boundary
677677```
678678
679679### 8.5 Clear Processing Model
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