kernel: fix heap addresses in docs, clean up APIC and IDT code

- Fix heap address references to use HHDM offset (0xFFFF_8000_4444_0000)
  in copilot-instructions.md and MEMORY_LAYOUT.md
- Document I/O APIC redirection entry format in ioapic::map_irq
- Remove unused ioapic::set_base call from apic::set_bases
- Remove hardcoded keyboard handler from IDT (now registered by kernel)

Author: gitcomit8

.github/copilot-instructions.md

@@ -44,7 +44,7 @@ Serix is a **microkernel-style x86_64 OS** written in Rust with these key archit
 - **Workspace-based cargo project**: Kernel and subsystems are separate crates (`kernel/`, `memory/`, `hal/`, `apic/`, `idt/`, `graphics/`, `task/`, `capability/`, `drivers/`, `vfs/`, `ipc/`, `loader/`, `ulib/`)
 - **Limine bootloader**: Uses Limine v10.x boot protocol (not GRUB). Limine sets up initial paging, framebuffer, and memory map before jumping to kernel
 - **Physical memory mapping**: All physical RAM is mapped at virtual offset `0xFFFF_8000_0000_0000` (HHDM - Higher Half Direct Map)
-- **Heap location**: Kernel heap lives at `0x4444_4444_0000` (1 MB by default, configured in `memory/src/heap.rs`)
+- **Heap location**: Kernel heap lives at `0xFFFF_8000_4444_0000` (1 MB by default, configured in `memory/src/heap.rs`)
 
 ### Boot Flow
 
@@ -68,7 +68,7 @@ The kernel entry point (`_start`) executes this initialization sequence:
 ### Memory Layout
 
 - **Physical memory offset (HHDM)**: `0xFFFF_8000_0000_0000`
-- **Kernel heap**: `0x4444_4444_0000` - `0x4444_4454_0000` (1 MB)
+- **Kernel heap**: `0xFFFF_8000_4444_0000` - `0xFFFF_8000_4454_0000` (1 MB)
 - **Kernel code**: High virtual addresses (loaded by Limine at `-2GB` from top typically)
 
 To convert physical to virtual: `virt = phys + HHDM_offset`

apic/src/ioapic.rs

@@ -48,11 +48,24 @@ unsafe fn ioapic_write(reg: u32, value: u32) {
  * @irq: IRQ line number
  * @vector: Interrupt vector to map to
  *
- * Routes the specified IRQ to the given interrupt vector.
+ * Routes the specified IRQ to the given interrupt vector and unmasks it.
+ * I/O APIC Redirection Entry format (lower 32 bits):
+ * - Bits 0-7: Vector
+ * - Bits 8-10: Delivery Mode (000 = Fixed)
+ * - Bit 11: Destination Mode (0 = Physical)
+ * - Bit 12: Delivery Status (read-only)
+ * - Bit 13: Polarity (0 = Active High)
+ * - Bit 14: Remote IRR (read-only)
+ * - Bit 15: Trigger Mode (0 = Edge)
+ * - Bit 16: Mask (0 = Enabled, 1 = Disabled)
+ * - Bits 17-31: Reserved
  */
 pub unsafe fn map_irq(irq: u8, vector: u8) {
 	let reg = 0x10 + (irq as u32 * 2);
-	ioapic_write(reg, vector as u32);
+	/* Set vector and enable (mask bit = 0) */
+	let low = vector as u32; // Bits 0-7 = vector, bit 16 = 0 (enabled)
+	ioapic_write(reg, low);
+	/* Upper 32 bits: destination (0 = BSP/CPU 0) */
 	ioapic_write(reg + 1, 0);
 }
 

apic/src/lib.rs

@@ -23,12 +23,9 @@ static APIC_BASE: AtomicU64 = AtomicU64::new(0xFEE00000);
 /*
  * set_bases - Update the base addresses for APIC components
  * @lapic: Virtual address of Local APIC
- * @ioapic: Virtual address of I/O APIC
  */
 pub fn set_bases(lapic: u64) {
 	APIC_BASE.store(lapic, Ordering::Relaxed);
-	// I/O APIC base is managed in ioapic.rs, we'll add a setter there
-	ioapic::set_base(0xFEC00000); // Default or pass as arg if needed
 }
 
 fn lapic_reg(offset: u32) -> *mut u32 {

docs/MEMORY_LAYOUT.md

@@ -79,17 +79,16 @@ Canonical Form:
                        │                                     │
                        │  Unused Virtual Space               │
                        │                                     │
-                       ├─────────────────────────────────────┤
-                       │  Memory-Mapped I/O (Future)         │
-                       │  (GPU framebuffers, PCIe BARs)      │
-                       ├─────────────────────────────────────┤
+0xFFFF_8000_4454_0000  ├─────────────────────────────────────┤
+                       │  Kernel Heap                        │
+                       │  Size: 1 MB (configurable)          │
+0xFFFF_8000_4444_0000  ├─────────────────────────────────────┤
                        │                                     │
                        │  Unused Virtual Space               │
                        │                                     │
-0x4444_4454_0000       ├─────────────────────────────────────┤
-                       │  Kernel Heap                        │
-                       │  Size: 1 MB (configurable)          │
-0x4444_4444_0000       ├─────────────────────────────────────┤
+                       ├─────────────────────────────────────┤
+                       │  Memory-Mapped I/O (Future)         │
+                       │  (GPU framebuffers, PCIe BARs)      │
                        │                                     │
                        │  Unused Virtual Space               │
                        │                                     │
@@ -144,7 +143,7 @@ Physical 0x0000_0001_0000_0000 (4 GB)
 - Consumes virtual address space equal to physical RAM
 - Not suitable for >64 TB systems (exceeds 47-bit canonical limit)
 
-#### Kernel Heap (0x4444_4444_0000 - 0x4444_4454_0000)
+#### Kernel Heap (0xFFFF_8000_4444_0000 - 0xFFFF_8000_4454_0000)
 
 **Purpose**: Dynamic memory allocation for kernel data structures.
 
@@ -551,7 +550,7 @@ SECTIONS {
 
 ### Heap Region
 
-**Virtual Range**: `0x4444_4444_0000` - `0x4444_4454_0000` (1 MB)
+**Virtual Range**: `0xFFFF_8000_4444_0000` - `0xFFFF_8000_4454_0000` (1 MB)
 
 **Physical Backing**: Allocated on demand from frame allocator during `init_heap()`.
 
@@ -753,7 +752,7 @@ let mut frame_alloc = StaticBootFrameAllocator::new(frame_count);
 #### Step 5: Initialize Heap
 
 ```rust
-const HEAP_START: usize = 0x4444_4444_0000;
+const HEAP_START: usize = 0xFFFF_8000_4444_0000;
 const HEAP_SIZE: usize = 1024 * 1024;  // 1 MB
 
 init_heap(&mut mapper, &mut frame_alloc);

idt/src/lib.rs

@@ -35,37 +35,14 @@ lazy_static! {
 		idt.divide_error.set_handler_fn(divide_by_zero_handler);
 		idt.page_fault.set_handler_fn(page_fault_handler);
 		idt.double_fault.set_handler_fn(double_fault_handler);
-		idt[33].set_handler_fn(keyboard_interrupt_handler);
+		/* Keyboard handler (IRQ 1, vector 33) is registered by kernel module */
 		IdtWrapper {
 			idt: UnsafeCell::new(idt),
 			loaded: UnsafeCell::new(false),
 		}
 	};
 }
 
-/*
- * keyboard_interrupt_handler - Handle keyboard interrupts
- * @_stack_frame: Interrupt stack frame (unused)
- *
- * Reads scancode from keyboard controller and sends EOI to APIC.
- */
-extern "x86-interrupt" fn keyboard_interrupt_handler(_stack_frame: InterruptStackFrame) {
-	use x86_64::instructions::port::Port;
-
-	/* Read scancode from keyboard data port */
-	let mut port = Port::new(0x60);
-	let scancode: u8 = unsafe { port.read() };
-
-	/* Process the scancode */
-	keyboard::handle_scancode(scancode);
-
-	/* Send End of Interrupt to Local APIC */
-	unsafe {
-		const APIC_EOI: *mut u32 = 0xFEE000B0 as *mut u32;
-		APIC_EOI.write_volatile(0);
-	}
-}
-
 /*
  * divide_by_zero_handler - Handle division by zero exception
  * @_stack: Interrupt stack frame (unused)