cargo: bump arm-gic from 0.7.2 to 0.8.1 in /src/exercises/bare-metal/rtc (#3145)

Bumps arm-gic from 0.7.2 to 0.8.1.

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
Co-authored-by: Andrew Walbran <qwandor@google.com>

Author: dependabot[bot]

src/exercises/bare-metal/rtc/Cargo.lock

@@ -9,12 +9,12 @@ publish = false
 [dependencies]
 aarch64-paging = { version = "0.12.0", default-features = false }
 aarch64-rt = "0.4.3"
-arm-gic = "0.7.2"
-arm-pl011-uart = "0.4.0"
+arm-gic = "0.8.1"
+arm-pl011-uart = "0.5.0"
 bitflags = "2.11.0"
 chrono = { version = "0.4.44", default-features = false }
 log = "0.4.29"
-safe-mmio = "0.2.7"
+safe-mmio = "0.3.0"
 smccc = "0.2.2"
 spin = "0.10.0"
 zerocopy = "0.8.48"

src/exercises/bare-metal/rtc/Cargo.toml

@@ -14,7 +14,8 @@
 // limitations under the License.
 
 use aarch64_rt::{ExceptionHandlers, RegisterStateRef, exception_handlers};
-use arm_gic::gicv3::{GicCpuInterface, InterruptGroup};
+use arm_gic::InterruptGroup;
+use arm_gic::gicv3::GicCpuInterface;
 use log::{error, info, trace};
 use smccc::Hvc;
 use smccc::psci::system_off;

src/exercises/bare-metal/rtc/src/exceptions.rs

@@ -32,10 +32,11 @@ use aarch64_paging::descriptor::El1Attributes;
 use aarch64_rt::{InitialPagetable, entry, initial_pagetable};
 use arm_gic::gicv3::registers::{Gicd, GicrSgi};
 use arm_gic::gicv3::{GicCpuInterface, GicV3};
-use arm_pl011_uart::{PL011Registers, Uart, UniqueMmioPointer};
+use arm_pl011_uart::{PL011Registers, Uart};
 use core::panic::PanicInfo;
 use core::ptr::NonNull;
 use log::{LevelFilter, error, info, trace};
+use safe_mmio::UniqueMmioPointer;
 use smccc::Hvc;
 use smccc::psci::system_off;