firmware: move narrowband_filter_set to fpga.h|c

Author: antoinevg

firmware/common/fpga.c

@@ -27,6 +27,7 @@
 #include "gpio.h"
 #include "hackrf_core.h"
 #include "ice40_spi.h"
+#include "platform_gpio.h"
 
 /* Set up all registers according to the loaded bitstream's defaults. */
 void fpga_init(fpga_driver_t* const drv)
@@ -137,3 +138,8 @@ void fpga_set_tx_nco_pstep(fpga_driver_t* const drv, const uint8_t phase_increme
 	set_FPGA_STANDARD_TX_PSTEP(drv, phase_increment);
 	fpga_regs_commit(drv);
 }
+
+void narrowband_filter_set(const uint8_t value)
+{
+	gpio_write(platform_gpio()->aa_en, value & 1);
+}

firmware/common/fpga.h

@@ -90,3 +90,5 @@ bool fpga_image_load(struct fpga_loader_t* loader, unsigned int index);
 bool fpga_spi_selftest(void);
 bool fpga_sgpio_selftest(void);
 bool fpga_if_xcvr_selftest(void);
+
+void narrowband_filter_set(const uint8_t value);

firmware/common/hackrf_core.c

@@ -458,10 +458,3 @@ void trigger_enable(const bool enable)
 	fpga_set_trigger_enable(&fpga, enable);
 #endif
 }
-
-#ifdef PRALINE
-void narrowband_filter_set(const uint8_t value)
-{
-	gpio_write(platform_gpio()->aa_en, value & 1);
-}
-#endif

firmware/common/hackrf_core.h

@@ -76,10 +76,6 @@ void pin_setup(void);
 
 void trigger_enable(const bool enable);
 
-#ifdef PRALINE
-void narrowband_filter_set(const uint8_t value);
-#endif
-
 #ifdef __cplusplus
 }
 #endif

firmware/hackrf_usb/usb_api_praline.c

@@ -25,13 +25,10 @@
 
 #include <clkin.h>
 #include <clock_gen.h>
-#include <rf_path.c>
+#include <fpga.h>
 #include <usb_queue.h>
 #include <usb_request.h>
 #include <usb_type.h>
-#if !(defined(DFU_MODE) || defined(RAM_MODE))
-	#include <fpga.h>
-#endif
 
 usb_request_status_t usb_vendor_request_p1_ctrl(
 	usb_endpoint_t* const endpoint,