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Merge pull request #1667 from martinling/strict-prototypes
Firmware: Enable `-Wstrict-prototypes` and fix remaining warnings
2 parents 1ee45ea + 2ffcc90 commit 3db0bbf

19 files changed

Lines changed: 50 additions & 50 deletions

firmware/common/fault_handler.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -73,17 +73,17 @@ __attribute__((used)) void hard_fault_handler_c(uint32_t* args)
7373
while (1) {}
7474
}
7575

76-
void mem_manage_handler()
76+
void mem_manage_handler(void)
7777
{
7878
while (1) {}
7979
}
8080

81-
void bus_fault_handler()
81+
void bus_fault_handler(void)
8282
{
8383
while (1) {}
8484
}
8585

86-
void usage_fault_handler()
86+
void usage_fault_handler(void)
8787
{
8888
while (1) {}
8989
}

firmware/common/fpga.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -76,8 +76,8 @@ void fpga_set_tx_nco_enable(fpga_driver_t* const drv, const bool enable);
7676
void fpga_set_tx_nco_pstep(fpga_driver_t* const drv, const uint8_t phase_increment);
7777

7878
bool fpga_image_load(unsigned int index);
79-
bool fpga_spi_selftest();
80-
bool fpga_sgpio_selftest();
81-
bool fpga_if_xcvr_selftest();
79+
bool fpga_spi_selftest(void);
80+
bool fpga_sgpio_selftest(void);
81+
bool fpga_if_xcvr_selftest(void);
8282

8383
#endif // __FPGA_H

firmware/common/fpga_selftest.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ static int rx_samples(const unsigned int num_samples, uint32_t max_cycles)
5050
return rc;
5151
}
5252

53-
bool fpga_spi_selftest()
53+
bool fpga_spi_selftest(void)
5454
{
5555
// Skip if FPGA configuration failed.
5656
if (selftest.fpga_image_load != PASSED) {
@@ -81,7 +81,7 @@ static uint8_t lfsr_advance(uint8_t v)
8181
return (v << 1) | feedback;
8282
}
8383

84-
bool fpga_sgpio_selftest()
84+
bool fpga_sgpio_selftest(void)
8585
{
8686
bool timeout = false;
8787

@@ -168,7 +168,7 @@ static bool in_range(int value, int expected, int error)
168168
return (value > min) && (value < max);
169169
}
170170

171-
bool fpga_if_xcvr_selftest()
171+
bool fpga_if_xcvr_selftest(void)
172172
{
173173
bool timeout = false;
174174

firmware/common/gpdma.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@
2424

2525
#include <libopencm3/lpc43xx/gpdma.h>
2626

27-
void gpdma_controller_enable()
27+
void gpdma_controller_enable(void)
2828
{
2929
GPDMA_CONFIG |= GPDMA_CONFIG_E(1);
3030
while ((GPDMA_CONFIG & GPDMA_CONFIG_E_MASK) == 0) {}

firmware/common/gpdma.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@
2828

2929
#include <libopencm3/lpc43xx/gpdma.h>
3030

31-
void gpdma_controller_enable();
31+
void gpdma_controller_enable(void);
3232

3333
void gpdma_channel_enable(const uint_fast8_t channel);
3434
void gpdma_channel_disable(const uint_fast8_t channel);

firmware/common/gpio.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@
2727

2828
typedef const struct gpio_t* gpio_t;
2929

30-
void gpio_init();
30+
void gpio_init(void);
3131
void gpio_set(gpio_t gpio);
3232
void gpio_clear(gpio_t gpio);
3333
void gpio_toggle(gpio_t gpio);

firmware/common/gpio_lpc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@
2424

2525
#include <stddef.h>
2626

27-
void gpio_init()
27+
void gpio_init(void)
2828
{
2929
for (size_t i = 0; i < 8; i++) {
3030
GPIO_LPC_PORT(i)->dir = 0;

firmware/common/ice40_spi.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -54,17 +54,17 @@ void ice40_spi_write(ice40_spi_driver_t* const drv, uint8_t r, uint16_t v)
5454
spi_bus_transfer(drv->bus, value, 3);
5555
}
5656

57-
static void spi_ssp1_wait_for_tx_fifo_not_full()
57+
static void spi_ssp1_wait_for_tx_fifo_not_full(void)
5858
{
5959
while ((SSP_SR(SSP1_BASE) & SSP_SR_TNF) == 0) {}
6060
}
6161

62-
static void spi_ssp1_wait_for_rx_fifo_not_empty()
62+
static void spi_ssp1_wait_for_rx_fifo_not_empty(void)
6363
{
6464
while ((SSP_SR(SSP1_BASE) & SSP_SR_RNE) == 0) {}
6565
}
6666

67-
static void spi_ssp1_wait_for_not_busy()
67+
static void spi_ssp1_wait_for_not_busy(void)
6868
{
6969
while (SSP_SR(SSP1_BASE) & SSP_SR_BSY) {}
7070
}

firmware/common/m0_sleep.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@
2020
* Boston, MA 02110-1301, USA.
2121
*/
2222

23-
int main()
23+
int main(void)
2424
{
2525
while (1) {}
2626
}

firmware/common/operacake_sctimer.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ static uint32_t default_output = 0;
5555
* On Praline, instead, MS0/CLK1 (SCT_CLK) is configured to output its
5656
* clock (f=2 * sample clock) to the SCTimer.
5757
*/
58-
void operacake_sctimer_init()
58+
void operacake_sctimer_init(void)
5959
{
6060
// We start by resetting the SCTimer
6161
RESET_CTRL1 = RESET_CTRL1_SCT_RST;
@@ -216,7 +216,7 @@ void operacake_sctimer_set_dwell_times(struct operacake_dwell_times* times, int
216216
SCT_CTRL &= ~SCT_CTRL_HALT_L(1);
217217
}
218218

219-
void operacake_sctimer_stop()
219+
void operacake_sctimer_stop(void)
220220
{
221221
// Halt timer
222222
SCT_CTRL |= SCT_CTRL_HALT_L(1);
@@ -228,7 +228,7 @@ void operacake_sctimer_stop()
228228
* called by set_transceiver_mode so the HackRF starts capturing with the
229229
* same antenna selected each time.
230230
*/
231-
void operacake_sctimer_reset_state()
231+
void operacake_sctimer_reset_state(void)
232232
{
233233
SCT_CTRL |= SCT_CTRL_HALT_L(1);
234234

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