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| 1 | +/* |
| 2 | + * Copyright 2026 Great Scott Gadgets <info@greatscottgadgets.com> |
| 3 | + * |
| 4 | + * This file is part of HackRF. |
| 5 | + * |
| 6 | + * This program is free software; you can redistribute it and/or modify |
| 7 | + * it under the terms of the GNU General Public License as published by |
| 8 | + * the Free Software Foundation; either version 2, or (at your option) |
| 9 | + * any later version. |
| 10 | + * |
| 11 | + * This program is distributed in the hope that it will be useful, |
| 12 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | + * GNU General Public License for more details. |
| 15 | + * |
| 16 | + * You should have received a copy of the GNU General Public License |
| 17 | + * along with this program; see the file COPYING. If not, write to |
| 18 | + * the Free Software Foundation, Inc., 51 Franklin Street, |
| 19 | + * Boston, MA 02110-1301, USA. |
| 20 | + */ |
| 21 | + |
| 22 | +#include "drivers.h" |
| 23 | + |
| 24 | +#include <stdbool.h> |
| 25 | + |
| 26 | +#include <libopencm3/lpc43xx/memorymap.h> |
| 27 | +#include <libopencm3/lpc43xx/ssp.h> |
| 28 | + |
| 29 | +#include "clock_gen.h" |
| 30 | +#include "i2c_lpc.h" |
| 31 | +#include "max283x.h" |
| 32 | +#include "max5864_target.h" |
| 33 | +#include "spi_bus.h" |
| 34 | +#include "w25q80bv_target.h" |
| 35 | +#if defined(PRALINE) |
| 36 | + #include "ice40_spi.h" |
| 37 | +#endif |
| 38 | + |
| 39 | +i2c_bus_t i2c0 = { |
| 40 | + .obj = (void*) I2C0_BASE, |
| 41 | + .start = i2c_lpc_start, |
| 42 | + .stop = i2c_lpc_stop, |
| 43 | + .transfer = i2c_lpc_transfer, |
| 44 | +}; |
| 45 | + |
| 46 | +i2c_bus_t i2c1 = { |
| 47 | + .obj = (void*) I2C1_BASE, |
| 48 | + .start = i2c_lpc_start, |
| 49 | + .stop = i2c_lpc_stop, |
| 50 | + .transfer = i2c_lpc_transfer, |
| 51 | +}; |
| 52 | + |
| 53 | +// const i2c_lpc_config_t i2c_config_si5351c_slow_clock = { |
| 54 | +// .duty_cycle_count = 15, |
| 55 | +// }; |
| 56 | + |
| 57 | +const i2c_lpc_config_t i2c_config_si5351c_fast_clock = { |
| 58 | + .duty_cycle_count = 255, |
| 59 | +}; |
| 60 | + |
| 61 | +si5351c_driver_t clock_gen = { |
| 62 | + .bus = &i2c0, |
| 63 | + .i2c_address = 0x60, |
| 64 | +}; |
| 65 | + |
| 66 | +ssp_config_t ssp_config_max283x = { |
| 67 | + /* FIXME speed up once everything is working reliably */ |
| 68 | + /* |
| 69 | + // Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz |
| 70 | + const uint8_t serial_clock_rate = 32; |
| 71 | + const uint8_t clock_prescale_rate = 128; |
| 72 | + */ |
| 73 | + // Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz |
| 74 | + .serial_clock_rate = 21, |
| 75 | + .clock_prescale_rate = 2, |
| 76 | +}; |
| 77 | + |
| 78 | +max283x_driver_t max283x = {}; |
| 79 | + |
| 80 | +ssp_config_t ssp_config_max5864 = { |
| 81 | + /* FIXME speed up once everything is working reliably */ |
| 82 | + /* |
| 83 | + // Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz |
| 84 | + const uint8_t serial_clock_rate = 32; |
| 85 | + const uint8_t clock_prescale_rate = 128; |
| 86 | + */ |
| 87 | + // Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz |
| 88 | + .data_bits = SSP_DATA_8BITS, |
| 89 | + .serial_clock_rate = 21, |
| 90 | + .clock_prescale_rate = 2, |
| 91 | +}; |
| 92 | + |
| 93 | +spi_bus_t spi_bus_ssp1 = { |
| 94 | + .obj = (void*) SSP1_BASE, |
| 95 | + .config = &ssp_config_max5864, |
| 96 | + .start = spi_ssp_start, |
| 97 | + .stop = spi_ssp_stop, |
| 98 | + .transfer = spi_ssp_transfer, |
| 99 | + .transfer_gather = spi_ssp_transfer_gather, |
| 100 | +}; |
| 101 | + |
| 102 | +max5864_driver_t max5864 = { |
| 103 | + .bus = &spi_bus_ssp1, |
| 104 | + .target_init = max5864_target_init, |
| 105 | +}; |
| 106 | + |
| 107 | +ssp_config_t ssp_config_w25q80bv = { |
| 108 | + .data_bits = SSP_DATA_8BITS, |
| 109 | + .serial_clock_rate = 2, |
| 110 | + .clock_prescale_rate = 2, |
| 111 | +}; |
| 112 | + |
| 113 | +spi_bus_t spi_bus_ssp0 = { |
| 114 | + .obj = (void*) SSP0_BASE, |
| 115 | + .config = &ssp_config_w25q80bv, |
| 116 | + .start = spi_ssp_start, |
| 117 | + .stop = spi_ssp_stop, |
| 118 | + .transfer = spi_ssp_transfer, |
| 119 | + .transfer_gather = spi_ssp_transfer_gather, |
| 120 | +}; |
| 121 | + |
| 122 | +w25q80bv_driver_t spi_flash = { |
| 123 | + .bus = &spi_bus_ssp0, |
| 124 | + .target_init = w25q80bv_target_init, |
| 125 | +}; |
| 126 | + |
| 127 | +sgpio_config_t sgpio_config = { |
| 128 | + .slice_mode_multislice = true, |
| 129 | +}; |
| 130 | + |
| 131 | +#ifdef PRALINE |
| 132 | +ssp_config_t ssp_config_ice40_fpga = { |
| 133 | + .data_bits = SSP_DATA_8BITS, |
| 134 | + .spi_mode = SSP_CPOL_1_CPHA_1, |
| 135 | + .serial_clock_rate = 21, |
| 136 | + .clock_prescale_rate = 2, |
| 137 | +}; |
| 138 | + |
| 139 | +ice40_spi_driver_t ice40 = { |
| 140 | + .bus = &spi_bus_ssp1, |
| 141 | +}; |
| 142 | + |
| 143 | +fpga_driver_t fpga = { |
| 144 | + .bus = &ice40, |
| 145 | +}; |
| 146 | +#endif |
| 147 | + |
| 148 | +radio_t radio = { |
| 149 | + .sample_rate_cb = sample_rate_set, |
| 150 | +}; |
| 151 | + |
| 152 | +rf_path_t rf_path = { |
| 153 | + .switchctrl = 0, |
| 154 | +}; |
| 155 | + |
| 156 | +jtag_gpio_t jtag_gpio_cpld = {}; |
| 157 | + |
| 158 | +jtag_t jtag_cpld = { |
| 159 | + .gpio = &jtag_gpio_cpld, |
| 160 | +}; |
| 161 | + |
| 162 | +void ssp1_set_mode_max283x(void) |
| 163 | +{ |
| 164 | + spi_bus_start(&spi_bus_ssp1, &ssp_config_max283x); |
| 165 | +} |
| 166 | + |
| 167 | +void ssp1_set_mode_max5864(void) |
| 168 | +{ |
| 169 | + spi_bus_start(max5864.bus, &ssp_config_max5864); |
| 170 | +} |
| 171 | + |
| 172 | +#ifdef PRALINE |
| 173 | +void ssp1_set_mode_ice40(void) |
| 174 | +{ |
| 175 | + spi_bus_start(&spi_bus_ssp1, &ssp_config_ice40_fpga); |
| 176 | +} |
| 177 | +#endif |
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