Skip to content

Commit fefd0ab

Browse files
antoinevgantoinevg
committed
firmware: move remaining scu's from hackrf_core to platform_scu
1 parent f95c7eb commit fefd0ab

21 files changed

Lines changed: 744 additions & 678 deletions

‎firmware/blinky/blinky.c‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -36,17 +36,18 @@ int main(void)
3636
#endif
3737

3838
/* Blink LED1/2/3 on the board. */
39-
while (1) {
39+
while (1)
40+
{
4041
led_on(LED1);
4142
led_on(LED2);
4243
led_on(LED3);
4344

4445
delay(2000000);
45-
46+
4647
led_off(LED1);
4748
led_off(LED2);
4849
led_off(LED3);
49-
50+
5051
delay(2000000);
5152
}
5253

‎firmware/common/hackrf_core.c‎

Lines changed: 56 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -849,8 +849,10 @@ void pin_shutdown(void)
849849
/* Configure all GPIO as Input (safe state) */
850850
gpio_init();
851851

852-
// detect platform
852+
/* Detect Platform */
853853
board_id_t board_id = detected_platform();
854+
const platform_gpio_t* gpio = platform_gpio();
855+
const platform_scu_t* scu = platform_scu();
854856

855857
/* TDI and TMS pull-ups are required in all JTAG-compliant devices.
856858
*
@@ -867,53 +869,54 @@ void pin_shutdown(void)
867869
* LPC43xx pull-up and pull-down resistors are approximately 53K.
868870
*/
869871
#if (defined HACKRF_ONE || defined PRALINE)
870-
scu_pinmux(SCU_PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
871-
scu_pinmux(SCU_PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
872+
scu_pinmux(scu->PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
873+
scu_pinmux(scu->PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
872874
#endif
873-
scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
875+
scu_pinmux(scu->PINMUX_CPLD_TCK, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
874876
#ifndef PRALINE
875-
scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
876-
scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
877-
scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
877+
scu_pinmux(scu->PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
878+
scu_pinmux(scu->PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
879+
scu_pinmux(scu->PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);
878880
#endif
879881

880882
/* Configure SCU Pin Mux as GPIO */
881-
scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_NOPULL);
882-
scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_NOPULL);
883-
scu_pinmux(SCU_PINMUX_LED3, SCU_GPIO_NOPULL);
884-
#ifdef RAD1O
885-
scu_pinmux(SCU_PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
886-
#endif
887-
#ifdef PRALINE
888-
scu_pinmux(SCU_PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
889-
#endif
883+
scu_pinmux(scu->PINMUX_LED1, SCU_GPIO_NOPULL);
884+
scu_pinmux(scu->PINMUX_LED2, SCU_GPIO_NOPULL);
885+
scu_pinmux(scu->PINMUX_LED3, SCU_GPIO_NOPULL);
886+
switch (board_id) {
887+
case BOARD_ID_RAD1O:
888+
scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
889+
break;
890+
case BOARD_ID_PRALINE:
891+
scu_pinmux(scu->PINMUX_LED4, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
892+
break;
893+
default:
894+
break;
895+
}
890896

891897
/* Configure USB indicators */
892898
#ifdef JAWBREAKER
893-
scu_pinmux(SCU_PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
894-
scu_pinmux(SCU_PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
899+
scu_pinmux(scu->PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
900+
scu_pinmux(scu->PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
895901
#endif
896902

897-
/* Get platform GPIO */
898-
const platform_gpio_t* gpio = platform_gpio();
899-
900903
switch (board_id) {
901904
case BOARD_ID_PRALINE:
902905
disable_1v2_power();
903906
disable_3v3aux_power();
904907
gpio_output(gpio->gpio_1v2_enable);
905908
gpio_output(gpio->gpio_3v3aux_enable_n);
906-
scu_pinmux(SCU_PINMUX_EN1V2, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
907-
scu_pinmux(SCU_PINMUX_EN3V3_AUX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
909+
scu_pinmux(scu->PINMUX_EN1V2, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
910+
scu_pinmux(scu->PINMUX_EN3V3_AUX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
908911
break;
909912
default:
910913
disable_1v8_power();
911914
if (detected_platform() == BOARD_ID_HACKRF1_R9) {
912915
gpio_output(gpio->h1r9_1v8_enable);
913-
scu_pinmux(SCU_H1R9_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
916+
scu_pinmux(scu->H1R9_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
914917
} else {
915918
gpio_output(gpio->gpio_1v8_enable);
916-
scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
919+
scu_pinmux(scu->PINMUX_EN1V8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
917920
}
918921
break;
919922
}
@@ -943,28 +946,28 @@ void pin_shutdown(void)
943946
scu_pinmux(CLK0, SCU_CLK_IN | SCU_CONF_FUNCTION7);
944947
scu_pinmux(CLK2, SCU_CLK_IN | SCU_CONF_FUNCTION7);
945948

946-
scu_pinmux(SCU_PINMUX_GPIO3_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
947-
scu_pinmux(SCU_PINMUX_GPIO3_11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
949+
scu_pinmux(scu->PINMUX_GPIO3_10, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
950+
scu_pinmux(scu->PINMUX_GPIO3_11, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
948951
break;
949952
default:
950953
break;
951954
}
952955

953956
switch (board_id) {
954957
case BOARD_ID_PRALINE:
955-
scu_pinmux(SCU_P2_CTRL0, SCU_P2_CTRL0_PINCFG);
956-
scu_pinmux(SCU_P2_CTRL1, SCU_P2_CTRL1_PINCFG);
957-
scu_pinmux(SCU_P1_CTRL0, SCU_P1_CTRL0_PINCFG);
958-
scu_pinmux(SCU_P1_CTRL1, SCU_P1_CTRL1_PINCFG);
959-
scu_pinmux(SCU_P1_CTRL2, SCU_P1_CTRL2_PINCFG);
960-
scu_pinmux(SCU_CLKIN_CTRL, SCU_CLKIN_CTRL_PINCFG);
961-
scu_pinmux(SCU_AA_EN, SCU_AA_EN_PINCFG);
962-
scu_pinmux(SCU_TRIGGER_IN, SCU_TRIGGER_IN_PINCFG);
963-
scu_pinmux(SCU_TRIGGER_OUT, SCU_TRIGGER_OUT_PINCFG);
964-
scu_pinmux(SCU_PPS_OUT, SCU_PPS_OUT_PINCFG);
965-
scu_pinmux(SCU_PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
966-
scu_pinmux(SCU_PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
967-
scu_pinmux(SCU_PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
958+
scu_pinmux(scu->P2_CTRL0, scu->P2_CTRL0_PINCFG);
959+
scu_pinmux(scu->P2_CTRL1, scu->P2_CTRL1_PINCFG);
960+
scu_pinmux(scu->P1_CTRL0, scu->P1_CTRL0_PINCFG);
961+
scu_pinmux(scu->P1_CTRL1, scu->P1_CTRL1_PINCFG);
962+
scu_pinmux(scu->P1_CTRL2, scu->P1_CTRL2_PINCFG);
963+
scu_pinmux(scu->CLKIN_CTRL, scu->CLKIN_CTRL_PINCFG);
964+
scu_pinmux(scu->AA_EN, scu->AA_EN_PINCFG);
965+
scu_pinmux(scu->TRIGGER_IN, scu->TRIGGER_IN_PINCFG);
966+
scu_pinmux(scu->TRIGGER_OUT, scu->TRIGGER_OUT_PINCFG);
967+
scu_pinmux(scu->PPS_OUT, scu->PPS_OUT_PINCFG);
968+
scu_pinmux(scu->PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
969+
scu_pinmux(scu->PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
970+
scu_pinmux(scu->PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
968971

969972
p2_ctrl_set(P2_SIGNAL_CLK3);
970973
p1_ctrl_set(P1_SIGNAL_CLKIN);
@@ -998,17 +1001,22 @@ void pin_shutdown(void)
9981001
/* Run after pin_shutdown() and prior to enabling power supplies. */
9991002
void pin_setup(void)
10001003
{
1001-
// detect platform
1004+
/* Detect Platform */
10021005
board_id_t board_id = detected_platform();
10031006
board_rev_t rev = detected_revision();
10041007
const platform_gpio_t* gpio = platform_gpio();
1008+
const platform_scu_t* scu = platform_scu();
10051009

10061010
led_off(0);
10071011
led_off(1);
10081012
led_off(2);
1009-
#ifdef RAD1O
1010-
led_off(3);
1011-
#endif
1013+
switch (board_id) {
1014+
case BOARD_ID_RAD1O:
1015+
case BOARD_ID_PRALINE:
1016+
led_off(3);
1017+
default:
1018+
break;
1019+
}
10121020

10131021
gpio_output(gpio->led[0]);
10141022
gpio_output(gpio->led[1]);
@@ -1026,11 +1034,9 @@ void pin_setup(void)
10261034

10271035
mixer_bus_setup(&mixer);
10281036

1029-
#ifdef HACKRF_ONE
10301037
if (detected_platform() == BOARD_ID_HACKRF1_R9) {
10311038
sgpio_config.gpio_trigger_enable = gpio->h1r9_trigger_enable;
10321039
}
1033-
#endif
10341040

10351041
// initialize rf_path struct and assign gpio's
10361042
switch (board_id) {
@@ -1095,7 +1101,7 @@ void pin_setup(void)
10951101
rf_path_pin_setup(&rf_path);
10961102

10971103
/* Configure external clock in */
1098-
scu_pinmux(SCU_PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
1104+
scu_pinmux(scu->PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
10991105

11001106
sgpio_configure_pin_functions(&sgpio_config);
11011107
}
@@ -1325,7 +1331,7 @@ void halt_and_flash(const uint32_t duration)
13251331
}
13261332
}
13271333

1328-
#ifdef PRALINE
1334+
//#ifdef PRALINE
13291335
void p1_ctrl_set(const p1_ctrl_signal_t signal)
13301336
{
13311337
gpio_write(platform_gpio()->p1_ctrl0, signal & 1);
@@ -1353,4 +1359,5 @@ void narrowband_filter_set(const uint8_t value)
13531359
{
13541360
gpio_write(platform_gpio()->aa_en, value & 1);
13551361
}
1356-
#endif
1362+
1363+
//#endif

‎firmware/common/hackrf_core.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -96,10 +96,11 @@ bool sample_rate_set(const uint32_t sampling_rate_hz);
9696

9797
clock_source_t activate_best_clock_source(void);
9898

99-
#if (defined HACKRF_ONE || defined RAD1O || defined PRALINE)
99+
//#if (defined HACKRF_ONE || defined RAD1O || defined PRALINE)
100100
void enable_rf_power(void);
101101
void disable_rf_power(void);
102-
#endif
102+
103+
//#endif
103104

104105
typedef enum {
105106
LED1 = 0,
@@ -117,7 +118,7 @@ void trigger_enable(const bool enable);
117118

118119
void halt_and_flash(const uint32_t duration);
119120

120-
#ifdef PRALINE
121+
// TODO #ifdef PRALINE
121122
typedef enum {
122123
P1_SIGNAL_TRIGGER_IN = 0,
123124
P1_SIGNAL_AUX_CLK1 = 1,
@@ -145,7 +146,7 @@ void p2_ctrl_set(const p2_ctrl_signal_t signal);
145146
void narrowband_filter_set(const uint8_t value);
146147
void clkin_ctrl_set(const clkin_signal_t value);
147148
void pps_out_set(const uint8_t value);
148-
#endif
149+
// TODO #endif
149150

150151
#ifdef __cplusplus
151152
}

‎firmware/common/ice40_spi.c‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -27,12 +27,13 @@
2727
void ice40_spi_target_init(ice40_spi_driver_t* const drv)
2828
{
2929
/* Configure SSP1 Peripheral and relevant FPGA pins. */
30-
scu_pinmux(SCU_SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
31-
scu_pinmux(SCU_SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
32-
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
33-
scu_pinmux(SCU_PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
34-
scu_pinmux(SCU_PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
35-
scu_pinmux(SCU_PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
30+
const platform_scu_t* scu = platform_scu();
31+
scu_pinmux(scu->SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
32+
scu_pinmux(scu->SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
33+
scu_pinmux(scu->SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
34+
scu_pinmux(scu->PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
35+
scu_pinmux(scu->PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
36+
scu_pinmux(scu->PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
3637

3738
/* Configure GPIOs as inputs or outputs as needed. */
3839
gpio_clear(drv->gpio_creset);

‎firmware/common/max2831_target.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,8 @@ void max2831_target_init(max2831_driver_t* const drv)
2828
const platform_scu_t* scu = platform_scu();
2929

3030
/* Configure SSP1 Peripheral (to be moved later in SSP driver) */
31-
scu_pinmux(SCU_SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
32-
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
31+
scu_pinmux(scu->SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
32+
scu_pinmux(scu->SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
3333

3434
scu_pinmux(scu->XCVR_CS, scu->XCVR_CS_PINCFG);
3535

‎firmware/common/max2837_target.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,9 +30,9 @@ void max2837_target_init(max2837_driver_t* const drv)
3030
const platform_scu_t* scu = platform_scu();
3131

3232
/* Configure SSP1 Peripheral (to be moved later in SSP driver) */
33-
scu_pinmux(SCU_SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
34-
scu_pinmux(SCU_SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
35-
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
33+
scu_pinmux(scu->SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
34+
scu_pinmux(scu->SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
35+
scu_pinmux(scu->SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
3636

3737
scu_pinmux(scu->XCVR_CS, scu->XCVR_CS_PINCFG);
3838

‎firmware/common/max2839_target.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,9 +30,9 @@ void max2839_target_init(max2839_driver_t* const drv)
3030
const platform_scu_t* scu = platform_scu();
3131

3232
/* Configure SSP1 Peripheral (to be moved later in SSP driver) */
33-
scu_pinmux(SCU_SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
34-
scu_pinmux(SCU_SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
35-
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
33+
scu_pinmux(scu->SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
34+
scu_pinmux(scu->SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
35+
scu_pinmux(scu->SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
3636

3737
scu_pinmux(scu->XCVR_CS, SCU_GPIO_FAST);
3838

‎firmware/common/max2871.c‎

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -41,14 +41,16 @@ static void delay_ms(int ms);
4141

4242
void max2871_setup(max2871_driver_t* const drv)
4343
{
44+
const platform_scu_t* scu = platform_scu();
45+
4446
/* Configure GPIO pins. */
45-
scu_pinmux(SCU_VCO_CE, SCU_GPIO_FAST);
46-
scu_pinmux(SCU_VCO_SCLK, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
47-
/* Only used for the debug pin config: scu_pinmux(SCU_VCO_SCLK, SCU_GPIO_FAST); */
48-
scu_pinmux(SCU_VCO_SDATA, SCU_GPIO_FAST);
49-
scu_pinmux(SCU_VCO_LE, SCU_GPIO_FAST);
50-
scu_pinmux(SCU_VCO_MUX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
51-
scu_pinmux(SCU_SYNT_RFOUT_EN, SCU_GPIO_FAST);
47+
scu_pinmux(scu->VCO_CE, SCU_GPIO_FAST);
48+
scu_pinmux(scu->VCO_SCLK, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
49+
/* Only used for the debug pin config: scu_pinmux(scu->VCO_SCLK, SCU_GPIO_FAST); */
50+
scu_pinmux(scu->VCO_SDATA, SCU_GPIO_FAST);
51+
scu_pinmux(scu->VCO_LE, SCU_GPIO_FAST);
52+
scu_pinmux(scu->VCO_MUX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
53+
scu_pinmux(scu->SYNT_RFOUT_EN, SCU_GPIO_FAST);
5254

5355
/* Set GPIO pins as outputs. */
5456
gpio_output(drv->gpio_vco_ce);

‎firmware/common/max5864_target.c‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -28,14 +28,16 @@ void max5864_target_init(max5864_driver_t* const drv)
2828
{
2929
(void) drv;
3030

31+
const platform_scu_t* scu = platform_scu();
32+
3133
/* Configure SSP1 Peripheral (to be moved later in SSP driver) */
32-
scu_pinmux(SCU_SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
33-
scu_pinmux(SCU_SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
34-
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
34+
scu_pinmux(scu->SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
35+
scu_pinmux(scu->SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
36+
scu_pinmux(scu->SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
3537

3638
/*
3739
* Configure CS_AD pin to keep the MAX5864 SPI disabled while we use the
3840
* SPI bus for the MAX2837. FIXME: this should probably be somewhere else.
3941
*/
40-
scu_pinmux(SCU_AD_CS, SCU_AD_CS_PINCFG);
42+
scu_pinmux(scu->AD_CS, scu->AD_CS_PINCFG);
4143
}

‎firmware/common/operacake.c‎

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -387,11 +387,13 @@ uint16_t gpio_test(uint8_t address)
387387
return 0xFFFF;
388388
}
389389

390-
scu_pinmux(SCU_PINMUX_GPIO3_8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
391-
scu_pinmux(SCU_PINMUX_GPIO3_12, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
392-
scu_pinmux(SCU_PINMUX_GPIO3_13, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
393-
scu_pinmux(SCU_PINMUX_GPIO3_14, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
394-
scu_pinmux(SCU_PINMUX_GPIO3_15, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
390+
const platform_scu_t* scu = platform_scu();
391+
392+
scu_pinmux(scu->PINMUX_GPIO3_8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
393+
scu_pinmux(scu->PINMUX_GPIO3_12, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
394+
scu_pinmux(scu->PINMUX_GPIO3_13, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
395+
scu_pinmux(scu->PINMUX_GPIO3_14, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
396+
scu_pinmux(scu->PINMUX_GPIO3_15, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
395397

396398
static struct gpio_t gpio_pins[] = {
397399
GPIO(3, 8), // u1ctrl IO2

0 commit comments

Comments
 (0)