Add basic SPU driver to psyqo

Based on a patch by Vatuu. Provides SPU initialization, DMA writes
to SPU RAM, channel silencing via dummy ADPCM loop, ADPCM playback,
and free channel detection.

Signed-off-by: Nicolas 'Pixel' Noble <nicolas@nobis-crew.org>

Author: nicolasnoble

src/mips/common/hardware/spu.h

@@ -55,6 +55,7 @@ struct SPUVoice {
 #define SPU_NOISE_EN_HIGH HW_U16(0x1f801d96)
 #define SPU_REVERB_EN_LOW HW_U16(0x1f801d98)
 #define SPU_REVERB_EN_HIGH HW_U16(0x1f801d9a)
+#define SPU_REVERB_ADDR HW_U16(0x1f801da2)
 
 #define SPU_RAM_DTA HW_U16(0x1f801da6)
 #define SPU_CTRL HW_U16(0x1f801daa)

src/mips/psyqo/msf.hh

@@ -32,8 +32,8 @@ SOFTWARE.
 
 namespace psyqo {
 
-static inline constexpr uint8_t btoi(uint8_t b) { return ((b / 16) * 10) + (b % 16); }
-static inline constexpr uint8_t itob(uint8_t i) { return ((i / 10) * 16) + (i % 10); }
+constexpr uint8_t btoi(uint8_t b) { return ((b / 16) * 10) + (b % 16); }
+constexpr uint8_t itob(uint8_t i) { return ((i / 10) * 16) + (i % 10); }
 
 struct MSF {
     MSF() : m(0), s(0), f(0) {}

src/mips/psyqo/spu.hh

@@ -26,15 +26,31 @@ SOFTWARE.
 
 #pragma once
 
+#include "fixed-point.hh"
+
 namespace psyqo {
 
 class SPU {
   public:
-    static void reset();
-    static void resetVoice(unsigned voice);
+    static void initialize();
+    static void silenceChannels(uint32_t channelMask);
+    static void dmaWrite(uint32_t spuAddress, const void *ramAddress, uint16_t dataSize, uint8_t blockSize);
+
+    struct ChannelPlaybackConfig {
+        FixedPoint<12, uint16_t> sampleRate;
+        uint16_t volumeLeft, volumeRight;
+        uint32_t adsr;
+    };
+
+    static void playADPCM(uint8_t channelId, uint16_t spuRamAddress, const ChannelPlaybackConfig &config, bool hardCut);
+    static uint32_t getNextFreeChannel();
+
+    static constexpr uint32_t NO_FREE_CHANNEL = 0xffffffff;
+    static constexpr uint32_t BASE_SAMPLE_RATE = 44100;
 
   private:
-    static void waitIdle();
+    template <typename T>
+    static bool waitForStatus(T mask, T expected, const volatile T *value);
 };
 
 }  // namespace psyqo

src/mips/psyqo/src/kernel.cpp

@@ -317,7 +317,7 @@ void dmaIRQ() {
 }  // namespace
 
 void psyqo::Kernel::Internal::prepare(Application& application) {
-    SPU::reset();
+    SPU::initialize();
     Hardware::CPU::IMask.clear();
     Hardware::CPU::IReg.clear();
     for (unsigned i = 0; i < 7; i++) {

src/mips/psyqo/src/spu.cpp

@@ -26,48 +26,124 @@ SOFTWARE.
 
 #include "psyqo/spu.hh"
 
-#include <EASTL/atomic.h>
-
-#include "EASTL/internal/atomic/atomic_memory_order.h"
+#include "common/hardware/dma.h"
 #include "common/hardware/spu.h"
+#include "psyqo/kernel.hh"
+
+constexpr uint16_t DUMMY_SAMPLE_POSITION = 0x1000;
+constexpr uint8_t DUMMY_SAMPLE_SIZE = 16;
+alignas(4) constexpr uint8_t DUMMY_SAMPLE[] = {0x00, 0b101, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                                               0x00, 0x00,  0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+void psyqo::SPU::dmaWrite(const uint32_t spuAddress, const void *ramAddress, const uint16_t dataSize,
+                          const uint8_t blockSize) {
+    Kernel::assert(blockSize % sizeof(uint32_t) == 0 && blockSize != 0 && blockSize <= 16, "Invalid DMA block size");
+    SPU_CTRL &= ~(0b11 << 4);
+    waitForStatus<uint16_t>(0b11 << 4, 0b00 << 4, &SPU_STATUS);
+    SPU_CTRL |= 1 << 5;
+    SPU_RAM_DTA = spuAddress / 8;
+    waitForStatus<uint16_t>(1 << 5, 1 << 5, &SPU_STATUS);
+
+    DPCR |= 1 << 19;
+    DPCR &= ~(0b111 << 16);
+    DPCR |= 0b100 << 16;
+    DMA_CTRL[DMA_SPU].MADR = reinterpret_cast<uint32_t>(ramAddress);
+    DMA_CTRL[DMA_SPU].BCR = blockSize | ((dataSize / blockSize) << 16);
+    DMA_CTRL[DMA_SPU].CHCR = 1 | 1 << 9 | 1 << 24;
 
-void psyqo::SPU::resetVoice(unsigned voiceID) {
-    SPU_VOICES[voiceID].volumeLeft = 0;
-    SPU_VOICES[voiceID].volumeRight = 0;
-    SPU_VOICES[voiceID].sampleRate = 0;
-    SPU_VOICES[voiceID].sampleStartAddr = 0;
-    SPU_VOICES[voiceID].ad = 0x000f;
-    SPU_VOICES[voiceID].currentVolume = 0;
-    SPU_VOICES[voiceID].sampleRepeatAddr = 0;
-    SPU_VOICES[voiceID].sr = 0x0000;
+    waitForStatus<uint32_t>(1 << 24, 0 << 24, &DMA_CTRL[DMA_SPU].CHCR);
 }
 
-void psyqo::SPU::waitIdle() {
-    do {
-        for (unsigned c = 0; c < 256; c++) eastl::atomic_signal_fence(eastl::memory_order_relaxed);
-    } while ((SPU_STATUS & 0x07ff) != 0);
+void psyqo::SPU::silenceChannels(const uint32_t channelMask) {
+    SPU_KEY_OFF_LOW = channelMask & 0xffff;
+    SPU_KEY_OFF_HIGH = (channelMask >> 16) & 0xffff;
+
+    for (uint8_t channel = 0; channel < 24; channel++) {
+        if (!((channelMask >> channel) & 1)) {
+            continue;
+        }
+        SPU_VOICES[channel].volumeLeft = 0;
+        SPU_VOICES[channel].volumeRight = 0;
+        SPU_VOICES[channel].sampleRate = 0;
+        SPU_VOICES[channel].sampleStartAddr = DUMMY_SAMPLE_POSITION / 8;
+        SPU_VOICES[channel].sampleRepeatAddr = DUMMY_SAMPLE_POSITION / 8;
+    }
+
+    SPU_KEY_ON_LOW = channelMask & 0xffff;
+    SPU_KEY_ON_HIGH = (channelMask >> 16) & 0xffff;
 }
 
-void psyqo::SPU::reset() {
-    SPU_VOL_MAIN_LEFT = 0x3800;
-    SPU_VOL_MAIN_RIGHT = 0x3800;
+template <typename T>
+bool psyqo::SPU::waitForStatus(const T mask, const T expected, const volatile T *value) {
+    for (int timeout = 10000; timeout >= 0; timeout--) {
+        if ((*value & mask) == expected) {
+            return true;
+        }
+    }
+    return false;
+}
+
+void psyqo::SPU::initialize() {
+    SBUS_DEV4_CTRL = 1 | 0b1110 << 4 | 1 << 8 | 1 << 12 | 1 << 13 | 0b1001 << 16 | 0 << 24 | 1 << 29;
+    DPCR |= 1 << 19;
+
     SPU_CTRL = 0;
-    SPU_KEY_ON_LOW = 0;
-    SPU_KEY_ON_HIGH = 0;
-    SPU_KEY_OFF_LOW = 0xffff;
-    SPU_KEY_OFF_HIGH = 0xffff;
-    SPU_RAM_DTC = 4;
-    SPU_VOL_CD_LEFT = 0;
-    SPU_VOL_CD_RIGHT = 0;
+
+    SPU_VOL_MAIN_LEFT = 0x7fff;
+    SPU_VOL_MAIN_RIGHT = 0x7fff;
+    SPU_REVERB_LEFT = 0;
+    SPU_REVERB_RIGHT = 0;
+
     SPU_PITCH_MOD_LOW = 0;
     SPU_PITCH_MOD_HIGH = 0;
     SPU_NOISE_EN_LOW = 0;
     SPU_NOISE_EN_HIGH = 0;
     SPU_REVERB_EN_LOW = 0;
     SPU_REVERB_EN_HIGH = 0;
+    SPU_REVERB_ADDR = 0xfffe;
+    SPU_VOL_CD_LEFT = 0;
+    SPU_VOL_CD_RIGHT = 0;
     SPU_VOL_EXT_LEFT = 0;
     SPU_VOL_EXT_RIGHT = 0;
-    SPU_CTRL = 0x8000;
+    SPU_RAM_DTC = 4;
+
+    dmaWrite(DUMMY_SAMPLE_POSITION, &DUMMY_SAMPLE, DUMMY_SAMPLE_SIZE, 4);
+
+    SPU_CTRL = 1 << 15 | 1 << 14 | 1 << 6;
+
+    silenceChannels(0xffffffff);
+}
+
+void psyqo::SPU::playADPCM(const uint8_t channelId, const uint16_t spuRamAddress, const ChannelPlaybackConfig &config,
+                           const bool hardCut) {
+    Kernel::assert(channelId < 24, "Invalid SPU channel ID");
+    if (hardCut) {
+        if (channelId > 15) {
+            SPU_KEY_OFF_HIGH |= 1 << (channelId - 16);
+        } else {
+            SPU_KEY_OFF_LOW |= 1 << (channelId);
+        }
+    }
+
+    SPU_VOICES[channelId].volumeLeft = config.volumeLeft;
+    SPU_VOICES[channelId].volumeRight = config.volumeRight;
+    SPU_VOICES[channelId].sampleRate = config.sampleRate.value;
+    SPU_VOICES[channelId].sampleStartAddr = spuRamAddress / 8;
+    SPU_VOICES[channelId].ad = config.adsr & 0xffff;
+    SPU_VOICES[channelId].sr = (config.adsr >> 16) & 0xffff;
+
+    if (channelId > 15) {
+        SPU_KEY_ON_HIGH |= 1 << (channelId - 16);
+    } else {
+        SPU_KEY_ON_LOW |= 1 << (channelId);
+    }
+}
 
-    for (unsigned i = 0; i < 24; i++) resetVoice(i);
+uint32_t psyqo::SPU::getNextFreeChannel() {
+    for (uint8_t channel = 0; channel < 24; channel++) {
+        if (SPU_VOICES[channel].currentVolume == 0) {
+            return channel;
+        }
+    }
+    return NO_FREE_CHANNEL;
 }