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[x64 JIT] Avoid unnecessary long jumps
1 parent b1080de commit 9e8b337

1 file changed

Lines changed: 14 additions & 14 deletions

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src/core/DynaRec_x64/instructions.cc

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1343,13 +1343,13 @@ void DynaRecCPU::testSoftwareInterrupt() {
13431343
if constexpr (loadSR) {
13441344
gen.mov(eax, dword[contextPointer + COP0_OFFSET(12)]); // eax = SR
13451345
}
1346-
gen.test(eax, 1); // Check if interrupts are enabled
1347-
gen.jz(label, CodeGenerator::LabelType::T_NEAR); // If not, skip to the end
1346+
gen.test(eax, 1); // Check if interrupts are enabled
1347+
gen.jz(label); // If not, skip to the end
13481348

13491349
gen.mov(arg2, dword[contextPointer + COP0_OFFSET(13)]); // arg2 = CAUSE
13501350
gen.and_(eax, arg2);
1351-
gen.test(eax, 0x300); // Check if an interrupt was force-fired
1352-
gen.jz(label, CodeGenerator::LabelType::T_NEAR); // Skip to the end if not
1351+
gen.test(eax, 0x300); // Check if an interrupt was force-fired
1352+
gen.jz(label); // Skip to the end if not
13531353

13541354
// Fire the interrupt if it was triggered
13551355
// This object in arg1. Exception code is already in arg2 from before (will be masked by exception handler)
@@ -1654,9 +1654,9 @@ void DynaRecCPU::recDIV() {
16541654
gen.mov(eax, m_regs[_Rs_].allocatedReg); // Dividend in eax
16551655
}
16561656

1657-
gen.mov(ecx, m_regs[_Rt_].allocatedReg); // Divisor in ecx
1658-
gen.test(ecx, ecx); // Check if divisor is 0
1659-
gen.jz(divisionByZero, CodeGenerator::LabelType::T_NEAR); // Jump to divisionByZero label if so
1657+
gen.mov(ecx, m_regs[_Rt_].allocatedReg); // Divisor in ecx
1658+
gen.test(ecx, ecx); // Check if divisor is 0
1659+
gen.jz(divisionByZero); // Jump to divisionByZero label if so
16601660
}
16611661

16621662
if (emitIntMinCheck) {
@@ -1676,8 +1676,8 @@ void DynaRecCPU::recDIV() {
16761676
gen.idiv(ecx); // Signed division by divisor
16771677

16781678
if (!m_regs[_Rt_].isConst()) { // Emit a division by 0 handler if the divisor is unknown at compile time
1679-
gen.jmp(end, CodeGenerator::LabelType::T_NEAR); // skip to the end if not a div by zero
1680-
gen.L(divisionByZero); // Here starts our division by 0 handler
1679+
gen.jmp(end); // skip to the end if not a div by zero
1680+
gen.L(divisionByZero); // Here starts our division by 0 handler
16811681

16821682
gen.mov(edx, eax); // Set hi to $rs
16831683
gen.shr(eax, 31);
@@ -1729,18 +1729,18 @@ void DynaRecCPU::recDIVU() {
17291729
gen.mov(eax, m_regs[_Rs_].allocatedReg); // Dividend in eax
17301730
}
17311731

1732-
gen.mov(ecx, m_regs[_Rt_].allocatedReg); // Divisor in ecx
1733-
gen.test(ecx, ecx); // Check if divisor is 0
1734-
gen.jz(divisionByZero, CodeGenerator::LabelType::T_NEAR); // Jump to divisionByZero label if so
1732+
gen.mov(ecx, m_regs[_Rt_].allocatedReg); // Divisor in ecx
1733+
gen.test(ecx, ecx); // Check if divisor is 0
1734+
gen.jz(divisionByZero); // Jump to divisionByZero label if so
17351735
}
17361736

17371737
gen.xor_(edx, edx); // Set top 32 bits of dividend to 0
17381738
gen.div(ecx); // Unsigned division by divisor
17391739

17401740
if (!m_regs[_Rt_].isConst()) { // Emit a division by 0 handler if the divisor is unknown at compile time
17411741
Label end;
1742-
gen.jmp(end, CodeGenerator::LabelType::T_NEAR); // skip to the end if not a div by zero
1743-
gen.L(divisionByZero); // Here starts our division by 0 handler
1742+
gen.jmp(end); // skip to the end if not a div by zero
1743+
gen.L(divisionByZero); // Here starts our division by 0 handler
17441744

17451745
gen.mov(edx, eax); // Set hi to $rs
17461746
gen.mov(eax, -1); // Set lo to -1

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