Silence compiler warnings

Author: h2zero

cores/nRF5/CMSIS/Include/mpu_armv7.h

@@ -193,7 +193,7 @@ __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
   __DMB();
   MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+  SCB->SHCSR = SCB->SHCSR | SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
   __DSB();
   __ISB();
@@ -205,9 +205,9 @@ __STATIC_INLINE void ARM_MPU_Disable(void)
 {
   __DMB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+  SCB->SHCSR = SCB->SHCSR & ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+  MPU->CTRL  = MPU->CTRL & ~MPU_CTRL_ENABLE_Msk;
   __DSB();
   __ISB();
 }

libraries/SPI/SPI.h

@@ -145,14 +145,14 @@ extern SPIClass SPI1;
 // For compatibility with sketches designed for AVR @ 16 MHz
 // New programs should use SPI.beginTransaction to set the SPI clock
 #ifdef F_CPU
-#define DIVISOR F_CPU / 16000000
-#define SPI_CLOCK_DIV2   2 * DIVISOR
-#define SPI_CLOCK_DIV4   4 * DIVISOR
-#define SPI_CLOCK_DIV8   8 * DIVISOR
-#define SPI_CLOCK_DIV16  16 * DIVISOR
-#define SPI_CLOCK_DIV32  32 * DIVISOR
-#define SPI_CLOCK_DIV64  64 * DIVISOR
-#define SPI_CLOCK_DIV128 128 * DIVISOR
+static constexpr uint32_t SPI_DIVISOR = (static_cast<uint32_t>(F_CPU) / 16000000UL);
+static constexpr uint32_t SPI_CLOCK_DIV2   = (2UL   * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV4   = (4UL   * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV8   = (8UL   * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV16  = (16UL  * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV32  = (32UL  * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV64  = (64UL  * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV128 = (128UL * SPI_DIVISOR);
 #endif
 
 #endif