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1 parent 463c8c6 commit fcd4238

3 files changed

Lines changed: 31 additions & 33 deletions

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src/CodeGen_D3D12Compute_Dev.cpp

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1694,9 +1694,7 @@ void CodeGen_D3D12Compute_Dev::CodeGen_D3D12Compute_C::add_kernel(Stmt s,
16941694
if (it != renames.end()) {
16951695
vector<Expr> new_args = op->args;
16961696
Expr renamed = StringImm::make(it->second);
1697-
new_args[0] = op->args[0].as<Broadcast>()
1698-
? Broadcast::make(renamed, op->args[0].as<Broadcast>()->lanes)
1699-
: renamed;
1697+
new_args[0] = op->args[0].as<Broadcast>() ? Broadcast::make(renamed, op->args[0].as<Broadcast>()->lanes) : renamed;
17001698
for (size_t i = 1; i < new_args.size(); ++i) {
17011699
new_args[i] = mutate(new_args[i]);
17021700
}
@@ -1710,7 +1708,8 @@ void CodeGen_D3D12Compute_Dev::CodeGen_D3D12Compute_C::add_kernel(Stmt s,
17101708

17111709
public:
17121710
RenameKernelArgs(const std::map<string, string> &r)
1713-
: renames(r) {}
1711+
: renames(r) {
1712+
}
17141713
};
17151714
s = RenameKernelArgs(dxc_renames)(s);
17161715

@@ -1892,13 +1891,12 @@ void CodeGen_D3D12Compute_Dev::init_module() {
18921891
#endif
18931892
// DXC (SM 6.x) rejects FXC-specific float literals 1.#IND / 1.#INF.
18941893
// Use asfloat() with IEEE 754 bit patterns instead.
1895-
<< (sm >= 60
1896-
? "float nan_f32() { return asfloat(0x7fc00000u); }\n"
1897-
"float neg_inf_f32() { return asfloat(0xff800000u); }\n"
1898-
"float inf_f32() { return asfloat(0x7f800000u); }\n"
1899-
: "float nan_f32() { return 1.#IND; }\n" // Quiet NaN with minimum fractional value.
1900-
"float neg_inf_f32() { return -1.#INF; }\n"
1901-
"float inf_f32() { return +1.#INF; }\n")
1894+
<< (sm >= 60 ? "float nan_f32() { return asfloat(0x7fc00000u); }\n"
1895+
"float neg_inf_f32() { return asfloat(0xff800000u); }\n"
1896+
"float inf_f32() { return asfloat(0x7f800000u); }\n" :
1897+
"float nan_f32() { return 1.#IND; }\n" // Quiet NaN with minimum fractional value.
1898+
"float neg_inf_f32() { return -1.#INF; }\n"
1899+
"float inf_f32() { return +1.#INF; }\n")
19021900
<< "#define float_from_bits asfloat\n"
19031901
// pow() in HLSL has the same semantics as C if
19041902
// x > 0. Otherwise, we need to emulate C

src/runtime/HalideRuntime.h

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1478,16 +1478,16 @@ typedef enum halide_target_feature_t {
14781478
halide_target_feature_avx10_1, ///< Intel AVX10 version 1 support. vector_bits is used to indicate width.
14791479
halide_target_feature_x86_apx, ///< Intel x86 APX support. Covers initial set of features released as APX: egpr,push2pop2,ppx,ndd .
14801480
halide_target_feature_simulator, ///< Target is for a simulator environment. Currently only applies to iOS.
1481-
halide_target_feature_hlsl_sm60, ///< Enable D3D12 Shader Model 6.0 (DXIL, 64-bit types, wave intrinsics). Requires d3d12compute. Uses DXC compiler.
1482-
halide_target_feature_hlsl_sm61, ///< Enable D3D12 Shader Model 6.1
1483-
halide_target_feature_hlsl_sm62, ///< Enable D3D12 Shader Model 6.2 (native 16-bit scalar types with -enable-16bit-types)
1484-
halide_target_feature_hlsl_sm63, ///< Enable D3D12 Shader Model 6.3
1485-
halide_target_feature_hlsl_sm64, ///< Enable D3D12 Shader Model 6.4
1486-
halide_target_feature_hlsl_sm65, ///< Enable D3D12 Shader Model 6.5
1487-
halide_target_feature_hlsl_sm66, ///< Enable D3D12 Shader Model 6.6 (64-bit atomics, packed 8-bit types)
1488-
halide_target_feature_hlsl_sm67, ///< Enable D3D12 Shader Model 6.7
1489-
halide_target_feature_hlsl_sm68, ///< Enable D3D12 Shader Model 6.8
1490-
halide_target_feature_hlsl_sm69, ///< Enable D3D12 Shader Model 6.9 (long vectors 5-1024 lanes, native 16-bit/wave/int64 required)
1481+
halide_target_feature_hlsl_sm60, ///< Enable D3D12 Shader Model 6.0 (DXIL, 64-bit types, wave intrinsics). Requires d3d12compute. Uses DXC compiler.
1482+
halide_target_feature_hlsl_sm61, ///< Enable D3D12 Shader Model 6.1
1483+
halide_target_feature_hlsl_sm62, ///< Enable D3D12 Shader Model 6.2 (native 16-bit scalar types with -enable-16bit-types)
1484+
halide_target_feature_hlsl_sm63, ///< Enable D3D12 Shader Model 6.3
1485+
halide_target_feature_hlsl_sm64, ///< Enable D3D12 Shader Model 6.4
1486+
halide_target_feature_hlsl_sm65, ///< Enable D3D12 Shader Model 6.5
1487+
halide_target_feature_hlsl_sm66, ///< Enable D3D12 Shader Model 6.6 (64-bit atomics, packed 8-bit types)
1488+
halide_target_feature_hlsl_sm67, ///< Enable D3D12 Shader Model 6.7
1489+
halide_target_feature_hlsl_sm68, ///< Enable D3D12 Shader Model 6.8
1490+
halide_target_feature_hlsl_sm69, ///< Enable D3D12 Shader Model 6.9 (long vectors 5-1024 lanes, native 16-bit/wave/int64 required)
14911491
halide_target_feature_end ///< A sentinel. Every target is considered to have this feature, and setting this feature does nothing.
14921492
} halide_target_feature_t;
14931493

test/correctness/math.cpp

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -276,20 +276,20 @@ fun_2(uint32_t, uint32_t, absd, absd);
276276
test_##type##_##name(args.data); \
277277
} while (0)
278278

279-
#define call_1_float_types(name, steps, start, end) \
280-
do { \
281-
call_1(float, name, steps, start, end); \
282-
if (!skip_double) { \
283-
call_1(double, name, steps, start, end); \
284-
} \
279+
#define call_1_float_types(name, steps, start, end) \
280+
do { \
281+
call_1(float, name, steps, start, end); \
282+
if (!skip_double) { \
283+
call_1(double, name, steps, start, end); \
284+
} \
285285
} while (0)
286286

287-
#define call_2_float_types(name, steps, start1, end1, start2, end2) \
288-
do { \
289-
call_2(float, name, steps, start1, end1, start2, end2); \
290-
if (!skip_double) { \
291-
call_2(double, name, steps, start1, end1, start2, end2); \
292-
} \
287+
#define call_2_float_types(name, steps, start1, end1, start2, end2) \
288+
do { \
289+
call_2(float, name, steps, start1, end1, start2, end2); \
290+
if (!skip_double) { \
291+
call_2(double, name, steps, start1, end1, start2, end2); \
292+
} \
293293
} while (0)
294294

295295
} // namespace

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