Initial CH32H41X support

examples/device/audio_4_channel_mic_freertos/skip.txt

@@ -1,4 +1,5 @@
 mcu:CH32F20X
+mcu:CH32H41X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307

examples/device/audio_test_freertos/skip.txt

@@ -1,4 +1,5 @@
 mcu:CH32F20X
+mcu:CH32H41X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307

examples/device/cdc_msc_freertos/skip.txt

@@ -1,4 +1,5 @@
 mcu:CH32F20X
+mcu:CH32H41X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307

examples/device/hid_composite_freertos/skip.txt

@@ -1,4 +1,5 @@
 mcu:CH32F20X
+mcu:CH32H41X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307

examples/device/midi_test_freertos/skip.txt

@@ -1,4 +1,5 @@
 mcu:CH32F20X
+mcu:CH32H41X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307

examples/device/net_lwip_webserver/skip.txt

@@ -1,5 +1,6 @@
 mcu:CH32V103
 mcu:CH32V20X
+mcu:CH32H41X
 mcu:LPC11UXX
 mcu:LPC13XX
 mcu:LPC15XX

hw/bsp/ch32h41x/boards/ch32h417qeu6_r0_1v1/board.cmake

@@ -0,0 +1,5 @@
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CH32H417
+    )
+endfunction()

hw/bsp/ch32h41x/boards/ch32h417qeu6_r0_1v1/board.h

@@ -0,0 +1,41 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026, TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/* metadata:
+   name: CH32H417QEU6-R0-1v1
+   url: https://github.com/openwch/ch32h417/tree/main/EVT/PUB/SCHPCB/CH32H417QEU6-R0
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif

hw/bsp/ch32h41x/boards/ch32h417qeu6_r0_1v1/board.mk

@@ -0,0 +1 @@
+MCU_VARIANT = CH32H417QEU6

hw/bsp/ch32h41x/ch32h417_conf.h

@@ -0,0 +1,8 @@
+#ifndef CH32H417_CONF_H_
+#define CH32H417_CONF_H_
+
+#include "ch32h417_gpio.h"
+#include "ch32h417_rcc.h"
+#include "ch32h417_usb.h"
+
+#endif

hw/bsp/ch32h41x/ch32h417_it.h

@@ -0,0 +1,4 @@
+#ifndef CH32H417_IT_H_
+#define CH32H417_IT_H_
+
+#endif

hw/bsp/ch32h41x/family.c

@@ -0,0 +1,128 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026, TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: WCH
+*/
+
+#include "ch32h417.h"
+#include "ch32h417_rcc.h"
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+
+__attribute__((interrupt)) void USBHS_IRQHandler(void);
+__attribute__((interrupt)) void SysTick0_Handler(void);
+
+__attribute__((interrupt)) void USBHS_IRQHandler(void) {
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+static uint32_t systick_config(uint32_t ticks) {
+  NVIC_EnableIRQ(SysTick0_IRQn);
+  SysTick0->CTLR = 0;
+  SysTick0->ISR = 0;
+  SysTick0->CNT = 0;
+  SysTick0->CMP = ticks - 1;
+  SysTick0->CTLR = 0x0F;
+  return 0;
+}
+#endif
+
+static void usbhs_clock_init(void) {
+  if ((RCC->PLLCFGR & RCC_SYSPLL_SEL) != RCC_SYSPLL_USBHS) {
+    RCC_USBHS_PLLCmd(DISABLE);
+    RCC_USBHSPLLCLKConfig(RCC_USBHSPLLSource_HSE);
+    RCC_USBHSPLLReferConfig(RCC_USBHSPLLRefer_25M);
+    RCC_USBHSPLLClockSourceDivConfig(RCC_USBHSPLL_IN_Div1);
+    RCC_USBHS_PLLCmd(ENABLE);
+    while (!(RCC->CTLR & RCC_USBHS_PLLRDY)) {
+    }
+  }
+
+  RCC_UTMIcmd(ENABLE);
+  RCC_HBPeriphClockCmd(RCC_HBPeriph_USBHS, ENABLE);
+}
+
+void board_init(void) {
+  __disable_irq();
+
+  SystemInit();
+  SystemAndCoreClockUpdate();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  systick_config(SystemCoreClock / 1000);
+#endif
+
+  usbhs_clock_init();
+
+  __enable_irq();
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+__attribute__((interrupt)) void SysTick0_Handler(void) {
+  SysTick0->ISR = 0;
+  system_ticks++;
+}
+
+uint32_t tusb_time_millis_api(void) {
+  return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+  (void) state;
+}
+
+uint32_t board_button_read(void) {
+  return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const* buf, int len) {
+  (void) buf;
+  return len;
+}

hw/bsp/ch32h41x/family.cmake

@@ -0,0 +1,107 @@
+include_guard()
+
+set(CH32_FAMILY ch32h417)
+set(SDK_DIR ${TOP}/hw/mcu/wch/${CH32_FAMILY})
+set(SDK_SRC_DIR ${SDK_DIR}/EVT/EXAM/SRC)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+
+# In actual fact, it is IMACBF
+set(CMAKE_SYSTEM_CPU rv32imac-ilp32 CACHE INTERNAL "System Processor" FORCE)
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS CH32H417 CACHE INTERNAL "")
+set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-dual-core.cfg -c noload")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+if (NOT DEFINED LD_FILE_GNU)
+  set(LD_FILE_GNU ${SDK_SRC_DIR}/Ld/V3F/Link_v3f.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+  set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_${CH32_FAMILY}_v3f.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_SRC_DIR}/Core/core_riscv.c
+    ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_flash.c
+    ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_gpio.c
+    ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_rcc.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_${CH32_FAMILY}.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_SRC_DIR}/Core
+    ${SDK_SRC_DIR}/Peripheral/inc
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CFG_TUD_WCH_USBIP_USBHS=1
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      -msmall-data-limit=8
+      -mno-save-restore
+      -fmessage-length=0
+      -fsigned-char
+      )
+  endif ()
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_CH32H417)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/wch/dcd_ch32_usbhs.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${SDK_SRC_DIR}/Core
+    ${SDK_SRC_DIR}/Peripheral/inc
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_openocd_wch(${TARGET})
+endfunction()

hw/bsp/ch32h41x/family.mk

@@ -0,0 +1,51 @@
+# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
+CROSS_COMPILE ?= riscv-none-elf-
+
+CH32_FAMILY = ch32h417
+SDK_DIR = hw/mcu/wch/$(CH32_FAMILY)
+SDK_SRC_DIR = $(SDK_DIR)/EVT/EXAM/SRC
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+# In actual fact, it is IMACBF
+CPU_CORE ?= rv32imac-ilp32
+
+# CH32H417 support is device-only over USBHS.
+SPEED ?= high
+
+CFLAGS += \
+	-flto \
+	-msmall-data-limit=8 \
+	-mno-save-restore \
+	-fmessage-length=0 \
+	-fsigned-char \
+	-DCH32H417 \
+	-DCFG_TUSB_MCU=OPT_MCU_CH32H417 \
+	-DCFG_TUD_WCH_USBIP_USBHS=1 \
+	-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED \
+
+LDFLAGS += \
+	-nostdlib -nostartfiles \
+	--specs=nosys.specs --specs=nano.specs \
+
+SRC_C += \
+	src/portable/wch/dcd_ch32_usbhs.c \
+	$(SDK_SRC_DIR)/Core/core_riscv.c \
+	$(SDK_SRC_DIR)/Peripheral/src/$(CH32_FAMILY)_flash.c \
+	$(SDK_SRC_DIR)/Peripheral/src/$(CH32_FAMILY)_gpio.c \
+	$(SDK_SRC_DIR)/Peripheral/src/$(CH32_FAMILY)_rcc.c \
+	$(FAMILY_PATH)/system_$(CH32_FAMILY).c \
+
+SRC_S += \
+	$(SDK_SRC_DIR)/Startup/startup_$(CH32_FAMILY)_v3f.S \
+
+INC += \
+	$(TOP)/$(SDK_SRC_DIR)/Core \
+	$(TOP)/$(SDK_SRC_DIR)/Peripheral/inc \
+	$(TOP)/$(FAMILY_PATH) \
+	$(TOP)/$(BOARD_PATH) \
+
+LD_FILE ?= $(SDK_SRC_DIR)/Ld/V3F/Link_v3f.ld
+
+OPENOCD_WCH_OPTION=-f $(TOP)/$(FAMILY_PATH)/wch-dual-core.cfg -c noload
+flash: flash-openocd-wch