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TSnake41
suggested changes
Apr 17, 2026
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| # Set CR0 (PM-bit is already set) | ||
| mov eax, cr0 | ||
| and eax, ~(1 << 2) # disable FPU emulation | ||
| or eax, (1 << 1) # enable FPU montitoring | ||
| and eax, ~(1 << 30) # enable caching | ||
| and eax, ~(1 << 29) # disable write through caching | ||
| and eax, ~(1 << 16) # allow kernel write access to read-only pages | ||
| or eax, (1 << 31) # enable paging | ||
| mov cr0, eax |
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PVH ABI (https://xenbits.xen.org/docs/unstable/misc/pvh.html) define CR0 state as
cr0: bit 0 (PE) must be set. All the other writeable bits are cleared.
Hence you don't need to to clear some of these bits.
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Thanks for pointing this out! :)
This is still very much work-in-progress. I will clean it up. 👍
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| mov eax, cr0 | ||
| or eax, CR0_FLAGS_PROTECTED_MODE_ENABLE | CR0_FLAGS_PAGING | ||
| mov cr0, eax | ||
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| # Set CR0 (PM-bit is already set) | ||
| mov eax, cr0 | ||
| and eax, ~(1 << 2) # disable FPU emulation | ||
| or eax, (1 << 1) # enable FPU montitoring | ||
| and eax, ~(1 << 30) # enable caching | ||
| and eax, ~(1 << 29) # disable write through caching | ||
| and eax, ~(1 << 16) # allow kernel write access to read-only pages | ||
| or eax, (1 << 31) # enable paging | ||
| mov cr0, eax |
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This PR adds PVH boot support directly to the kernel. This allows the kernel to be booted in QEMU, Firecracker, and Cloud Hypervisor directly, without the loader.
The
pvhcrate was successfully published.Closes #2373.