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docs: add unified levels documentation
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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UNIFIED-LEVELS.md

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// SPDX-License-Identifier: PMPL-2.0-or-later
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= Unified Level System — TypeLL / VQL-UT / VeriSimDB / TypedQLiser / PanLL
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:toc:
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== Level Definitions
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[cols="1,3,3"]
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|===
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| Level | Name | Criteria
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| L0 | Scaffold | Repo exists, no functional code
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| L1 | Spec | Specifications/types defined, no runtime
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| L2 | Partial | Some code works standalone, not connected
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| L3 | Core | Main engine works, tests pass, standalone
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| L4 | Integrated | Connected to adjacent systems, data flows
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| L5 | End-to-end | Full pipeline works across all systems
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| L6 | Tested | Point-to-point, end-to-end, aspect tests + benchmarks
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| L7 | Production | Published, documented, CI green, ready for users
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|===
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== Current State (2026-03-21)
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[cols="2,1,3"]
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|===
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| Component | Level | Notes
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| TypeLL core engine | L1 | Specs exist, no runtime type checker
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| TypedQLiser L5-10 | L1 | Levels 1-4 work, 5-10 need TypeLL
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| PanLL VQL panel | L0 | Does not exist
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| VQL-UT → VeriSimDB bridge | L2 | Parser works, no DB execution
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| VeriSimDB octad storage | L4 | Phase 4 validated, production tested
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| PanLL TypeLL panel | L2 | ReScript UI exists, not verified running
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| TypeLL-VQL bridge | L2 | Crate exists, depends on typell-core
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|===
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== Level-Up Plan
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Round 1: Bring trailing (L0/L1) → L3::
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1. TypeLL core engine: implement type checker runtime
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2. PanLL VQL panel: create the panel
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3. TypedQLiser L5-10: implement with TypeLL backing
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Round 2: Bring all → L4 (integrated)::
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4. Wire VQL-UT → VeriSimDB runtime bridge
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5. Wire TypeLL → TypedQLiser for levels 5-10
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6. Wire PanLL TypeLL panel → running TypeLL server
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7. Wire PanLL VQL panel → VQL-UT
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Round 3: Bring all → L5 (end-to-end)::
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8. PanLL → TypeLL → VQL-UT → VeriSimDB pipeline test
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9. TypedQLiser → TypeLL → VQL-UT type checking pipeline
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Round 4: Bring all → L6 (tested + benchmarked)::
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10. Point-to-point tests for every connection
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11. End-to-end tests for full pipelines
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12. Aspect tests (error handling, edge cases, concurrency)
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13. Benchmarks (latency, throughput, memory)

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