Skip to content

Commit 311d5bd

Browse files
illustriousnessillustriousness
committed
[fix] gd32: can: add IRQ aliases and init fixes for legacy series
 - add CAN0 IRQ alias macros for F10x/F30x/E50x - guard optional CAN1 IRQs - adjust RX pin mode and auto-retrans handling
1 parent 7641ef6 commit 311d5bd

1 file changed

Lines changed: 47 additions & 19 deletions

File tree

‎bsp/gd32/arm/libraries/gd32_drivers/drv_can.c‎

Lines changed: 47 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,20 @@
1919
#define LOG_TAG "can_drv"
2020
#include <drv_log.h>
2121

22+
#if (defined(SOC_SERIES_GD32F10x) && !defined(GD32F10X_CL)) || \
23+
(defined(SOC_SERIES_GD32F30x) && !defined(GD32F30X_CL)) || \
24+
(defined(SOC_SERIES_GD32E50x) && defined(GD32E50X_HD))
25+
#define CAN0_TX_IRQn_ALIAS USBD_HP_CAN0_TX_IRQn
26+
#define CAN0_RX0_IRQn_ALIAS USBD_LP_CAN0_RX0_IRQn
27+
#define CAN0_TX_ISR_HANDLER USBD_HP_CAN0_TX_IRQHandler
28+
#define CAN0_RX0_ISR_HANDLER USBD_LP_CAN0_RX0_IRQHandler
29+
#else
30+
#define CAN0_TX_IRQn_ALIAS CAN0_TX_IRQn
31+
#define CAN0_RX0_IRQn_ALIAS CAN0_RX0_IRQn
32+
#define CAN0_TX_ISR_HANDLER CAN0_TX_IRQHandler
33+
#define CAN0_RX0_ISR_HANDLER CAN0_RX0_IRQHandler
34+
#endif
35+
2236
#if defined(GD32F405) || defined(GD32F407) /* 42MHz(max) */
2337
static const struct gd32_baudrate_tbl can_baudrate_tbl[] =
2438
{
@@ -45,7 +59,7 @@ static const struct gd32_baudrate_tbl can_baudrate_tbl[] =
4559
{CAN20kBaud, CAN_BT_SJW_1TQ, CAN_BT_BS1_8TQ, CAN_BT_BS2_1TQ, 250},
4660
{CAN10kBaud, CAN_BT_SJW_1TQ, CAN_BT_BS1_8TQ, CAN_BT_BS2_1TQ, 500},
4761
};
48-
#elif defined(GD32F470) /* 60MHz(max) */
62+
#elif defined(GD32F470) || defined(SOC_SERIES_GD32F30x) /* 60MHz(max) */
4963
static const struct gd32_baudrate_tbl can_baudrate_tbl[] =
5064
{
5165
{CAN1MBaud, CAN_BT_SJW_1TQ, CAN_BT_BS1_12TQ, CAN_BT_BS2_2TQ, 4},
@@ -63,19 +77,11 @@ static const struct gd32_baudrate_tbl can_baudrate_tbl[] =
6377
#endif
6478

6579
#ifdef BSP_USING_CAN0
66-
static struct gd32_can_device dev_can0 =
67-
{
68-
.name = "can0",
69-
.can_x = CAN0,
70-
};
80+
static struct gd32_can_device dev_can0;
7181
#endif
7282

7383
#ifdef BSP_USING_CAN1
74-
static struct gd32_can_device dev_can1 =
75-
{
76-
"can1",
77-
.can_x = CAN1,
78-
};
84+
static struct gd32_can_device dev_can1;
7985
#endif
8086

8187
static const struct gd32_can gd32_can_gpio[] =
@@ -167,7 +173,7 @@ static void gd32_can_gpio_init(void)
167173
gpio_mode_set(PIN_GDPORT(gd32_can_gpio[i].rx_pin), GPIO_MODE_AF, GPIO_PUPD_NONE, PIN_GDPIN(gd32_can_gpio[i].rx_pin));
168174
#else
169175
gpio_init(PIN_GDPORT(gd32_can_gpio[i].tx_pin), GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, PIN_GDPIN(gd32_can_gpio[i].tx_pin));
170-
gpio_init(PIN_GDPORT(gd32_can_gpio[i].rx_pin), GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, PIN_GDPIN(gd32_can_gpio[i].rx_pin));
176+
gpio_init(PIN_GDPORT(gd32_can_gpio[i].rx_pin), GPIO_MODE_IPU, GPIO_OSPEED_50MHZ, PIN_GDPIN(gd32_can_gpio[i].rx_pin));
171177
#endif
172178
}
173179
}
@@ -201,7 +207,11 @@ static rt_err_t _can_config(struct rt_can_device *can, struct can_configure *cfg
201207
can_init_struct.time_triggered = DISABLE;
202208
can_init_struct.auto_bus_off_recovery = ENABLE;
203209
can_init_struct.auto_wake_up = ENABLE;
210+
#if defined(SOC_SERIES_GD32F10x) || defined(SOC_SERIES_GD32F20x) || defined(SOC_SERIES_GD32F30x)
211+
can_init_struct.no_auto_retrans = ENABLE;
212+
#else
204213
can_init_struct.auto_retrans = DISABLE;
214+
#endif
205215
can_init_struct.rec_fifo_overwrite = DISABLE;
206216
can_init_struct.trans_fifo_order = DISABLE;
207217

@@ -254,15 +264,17 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
254264
#ifdef CAN0
255265
if (CAN0 == can_dev->can_x)
256266
{
257-
nvic_irq_disable(CAN0_RX0_IRQn);
267+
nvic_irq_disable(CAN0_RX0_IRQn_ALIAS);
258268
nvic_irq_disable(CAN0_RX1_IRQn);
259269
}
260270
#endif
261271
#ifdef CAN1
262272
if (CAN1 == can_dev->can_x)
263273
{
274+
#if defined(CAN1_RX0_IRQn)
264275
nvic_irq_disable(CAN1_RX0_IRQn);
265276
nvic_irq_disable(CAN1_RX1_IRQn);
277+
#endif
266278
}
267279
#endif
268280
can_interrupt_disable(can_dev->can_x, CAN_INT_RFNE0);
@@ -277,13 +289,15 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
277289
#ifdef CAN0
278290
if (CAN0 == can_dev->can_x)
279291
{
280-
nvic_irq_disable(CAN0_TX_IRQn);
292+
nvic_irq_disable(CAN0_TX_IRQn_ALIAS);
281293
}
282294
#endif
283295
#ifdef CAN1
284296
if (CAN1 == can_dev->can_x)
285297
{
298+
#if defined(CAN1_TX_IRQn)
286299
nvic_irq_disable(CAN1_TX_IRQn);
300+
#endif
287301
}
288302
#endif
289303
can_interrupt_disable(can_dev->can_x, CAN_INT_TME);
@@ -299,7 +313,9 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
299313
#ifdef CAN1
300314
if (CAN1 == can_dev->can_x)
301315
{
316+
#if defined(CAN1_EWMC_IRQn)
302317
nvic_irq_disable(CAN1_EWMC_IRQn);
318+
#endif
303319
}
304320
#endif
305321
can_interrupt_disable(can_dev->can_x, CAN_INT_WERR);
@@ -322,15 +338,17 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
322338
#ifdef CAN0
323339
if (CAN0 == can_dev->can_x)
324340
{
325-
nvic_irq_enable(CAN0_RX0_IRQn, 1, 0);
341+
nvic_irq_enable(CAN0_RX0_IRQn_ALIAS, 1, 0);
326342
nvic_irq_enable(CAN0_RX1_IRQn, 1, 0);
327343
}
328344
#endif
329345
#ifdef CAN1
330346
if (CAN1 == can_dev->can_x)
331347
{
348+
#if defined(CAN1_RX0_IRQn)
332349
nvic_irq_enable(CAN1_RX0_IRQn, 1, 0);
333350
nvic_irq_enable(CAN1_RX1_IRQn, 1, 0);
351+
#endif
334352
}
335353
#endif
336354
}
@@ -340,13 +358,15 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
340358
#ifdef CAN0
341359
if (CAN0 == can_dev->can_x)
342360
{
343-
nvic_irq_enable(CAN0_TX_IRQn, 1, 0);
361+
nvic_irq_enable(CAN0_TX_IRQn_ALIAS, 1, 0);
344362
}
345363
#endif
346364
#ifdef CAN1
347365
if (CAN1 == can_dev->can_x)
348366
{
367+
#if defined(CAN1_TX_IRQn)
349368
nvic_irq_enable(CAN1_TX_IRQn, 1, 0);
369+
#endif
350370
}
351371
#endif
352372
}
@@ -366,7 +386,9 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
366386
#ifdef CAN1
367387
if (CAN1 == can_dev->can_x)
368388
{
389+
#if defined(CAN1_EWMC_IRQn)
369390
nvic_irq_enable(CAN1_EWMC_IRQn, 1, 0);
391+
#endif
370392
}
371393
#endif
372394
}
@@ -906,7 +928,7 @@ static void _can_tx_isr(struct rt_can_device *can)
906928
/**
907929
* @brief This function handles CAN0 TX interrupts. transmit fifo0/1/2 is empty can trigger this interrupt
908930
*/
909-
void CAN0_TX_IRQHandler(void)
931+
void CAN0_TX_ISR_HANDLER(void)
910932
{
911933
rt_interrupt_enter();
912934
_can_tx_isr(&dev_can0.device);
@@ -916,7 +938,7 @@ void CAN0_TX_IRQHandler(void)
916938
/**
917939
* @brief This function handles CAN0 RX0 interrupts.
918940
*/
919-
void CAN0_RX0_IRQHandler(void)
941+
void CAN0_RX0_ISR_HANDLER(void)
920942
{
921943
rt_interrupt_enter();
922944
_can_rx_isr(&dev_can0.device, CAN_RX_FIFO0);
@@ -1009,7 +1031,7 @@ int rt_hw_can_init(void)
10091031
config.ticks = 50;
10101032
#ifdef RT_CAN_USING_HDR
10111033
config.maxhdr = 14;
1012-
#ifdef CAN1
1034+
#ifdef CAN1_EWMC_IRQn
10131035
config.maxhdr = 28;
10141036
#endif
10151037
#endif
@@ -1033,6 +1055,9 @@ int rt_hw_can_init(void)
10331055
#ifdef BSP_USING_CAN0
10341056
filter_config.filter_number = 0;
10351057

1058+
dev_can0.name = "can0";
1059+
dev_can0.can_x = CAN0;
1060+
10361061
dev_can0.filter_config = filter_config;
10371062
dev_can0.device.config = config;
10381063
/* register CAN1 device */
@@ -1045,6 +1070,9 @@ int rt_hw_can_init(void)
10451070
#ifdef BSP_USING_CAN1
10461071
filter_config.filter_number = 14;
10471072

1073+
dev_can1.name = "can1";
1074+
dev_can1.can_x = CAN1;
1075+
10481076
dev_can1.filter_config = filter_config;
10491077
dev_can1.device.config = config;
10501078
/* register CAN2 device */

0 commit comments

Comments
 (0)