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| 1 | +/* |
| 2 | +* Copyright (c) 2011 Intel Corporation |
| 3 | +* |
| 4 | +* Redistribution and use in source and binary forms, with or without |
| 5 | +* modification, are permitted provided that the following conditions are met: |
| 6 | +* |
| 7 | +* 1. Redistributions of source code must retain the above copyright notice, |
| 8 | +* this list of conditions and the following disclaimer. |
| 9 | +* |
| 10 | +* 2. Redistributions in binary form must reproduce the above copyright |
| 11 | +* notice, this list of conditions and the following disclaimer in the |
| 12 | +* documentation and/or other materials provided with the distribution. |
| 13 | +* |
| 14 | +* 3. Neither the name of the copyright holder nor the names of its |
| 15 | +* contributors may be used to endorse or promote products derived from |
| 16 | +* this software without specific prior written permission. |
| 17 | +* |
| 18 | +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | +* POSSIBILITY OF SUCH DAMAGE. |
| 29 | +*/ |
| 30 | + |
| 31 | +#include "../include/hax.h" |
| 32 | +#include "../include/asm.h" |
| 33 | + |
| 34 | +struct qword_val { |
| 35 | + uint32 low; |
| 36 | + uint32 high; |
| 37 | +}; |
| 38 | + |
| 39 | +extern void ASMCALL asm_enable_irq(void); |
| 40 | +extern void ASMCALL asm_disable_irq(void); |
| 41 | + |
| 42 | +extern void asm_btr(uint8 *addr, uint bit); |
| 43 | +extern void asm_bts(uint8 *addr, uint bit); |
| 44 | + |
| 45 | +extern void asm_fxinit(void); |
| 46 | +extern void asm_fxsave(mword *addr); |
| 47 | +extern void asm_fxrstor(mword *addr); |
| 48 | + |
| 49 | + |
| 50 | +#ifdef _M_IX86 |
| 51 | +extern uint64 ASMCALL asm_vmread(uint32 component); |
| 52 | +extern void ASMCALL asm_vmwrite(uint32 component, uint32 val); |
| 53 | +extern void ASMCALL asm_rdmsr(uint32 reg, struct qword_val *qv); |
| 54 | +extern void ASMCALL asm_wrmsr(uint32 reg, struct qword_val *qv); |
| 55 | +extern void ASMCALL asm_rdtsc(struct qword_val *qv); |
| 56 | +#else // !_M_IX86 |
| 57 | +extern uint32 ASMCALL asm_vmread(uint32 component); |
| 58 | +extern void ASMCALL asm_vmwrite(uint32 component, uint64 val); |
| 59 | +extern uint64 ASMCALL asm_rdmsr(uint32 reg); |
| 60 | +extern void ASMCALL asm_wrmsr(uint32 reg, uint64_t val); |
| 61 | +extern uint64 ASMCALL asm_rdtsc(); |
| 62 | +#endif // _M_IX86 |
| 63 | + |
| 64 | +uint64 ia32_rdmsr(uint32 reg) |
| 65 | +{ |
| 66 | +#ifdef _M_IX86 |
| 67 | + struct qword_val val = { 0 }; |
| 68 | + |
| 69 | + asm_rdmsr(reg, &val); |
| 70 | + return ((uint64)(val.low) | (uint64)(val.high) << 32); |
| 71 | +#else |
| 72 | + return asm_rdmsr(reg); |
| 73 | +#endif |
| 74 | +} |
| 75 | + |
| 76 | +void ia32_wrmsr(uint32 reg, uint64 val) |
| 77 | +{ |
| 78 | +#ifdef _M_IX86 |
| 79 | + struct qword_val tmp = { 0 }; |
| 80 | + |
| 81 | + tmp.high = (uint32)(val >> 32); |
| 82 | + tmp.low = (uint32)val; |
| 83 | + asm_wrmsr(reg, &tmp); |
| 84 | +#else |
| 85 | + asm_wrmsr(reg, val); |
| 86 | +#endif |
| 87 | +} |
| 88 | + |
| 89 | +uint64 rdtsc(void) |
| 90 | +{ |
| 91 | +#ifdef _M_IX86 |
| 92 | + struct qword_val val = { 0 }; |
| 93 | + asm_rdtsc(&val); |
| 94 | + return ((uint64)(val.low) | (uint64)(val.high) << 32); |
| 95 | +#else |
| 96 | + return asm_rdtsc(); |
| 97 | +#endif |
| 98 | +} |
| 99 | + |
| 100 | +void fxinit(void) |
| 101 | +{ |
| 102 | + asm_fxinit(); |
| 103 | +} |
| 104 | + |
| 105 | +void fxsave(mword *addr) |
| 106 | +{ |
| 107 | + asm_fxsave(addr); |
| 108 | +} |
| 109 | + |
| 110 | +void fxrstor(mword *addr) |
| 111 | +{ |
| 112 | + asm_fxrstor(addr); |
| 113 | +} |
| 114 | + |
| 115 | +void btr(uint8 *addr, uint bit) |
| 116 | +{ |
| 117 | + // asm_btr() may not be able to handle bit offsets greater than 0xff. For |
| 118 | + // absolute safety, ensure that the bit offset is less than 8. |
| 119 | + uint8 *base = addr + bit / 8; |
| 120 | + uint offset = bit % 8; |
| 121 | + asm_btr(base, offset); |
| 122 | +} |
| 123 | + |
| 124 | +void bts(uint8 *addr, uint bit) |
| 125 | +{ |
| 126 | + uint8 *base = addr + bit / 8; |
| 127 | + uint offset = bit % 8; |
| 128 | + asm_bts(base, offset); |
| 129 | +} |
| 130 | + |
| 131 | +void _vmx_vmwrite(struct vcpu_t *vcpu, const char *name, |
| 132 | + component_index_t component, |
| 133 | + mword source_val) |
| 134 | +{ |
| 135 | + asm_vmwrite(component, source_val); |
| 136 | +} |
| 137 | + |
| 138 | +void _vmx_vmwrite_64(struct vcpu_t *vcpu, const char *name, |
| 139 | + component_index_t component, |
| 140 | + uint64 source_val) |
| 141 | +{ |
| 142 | +#ifdef _M_IX86 |
| 143 | + asm_vmwrite(component, (uint32)source_val); |
| 144 | + asm_vmwrite(component + 1, (uint32)(source_val >> 32)); |
| 145 | +#else |
| 146 | + asm_vmwrite(component, source_val); |
| 147 | +#endif |
| 148 | +} |
| 149 | + |
| 150 | +void _vmx_vmwrite_natural(struct vcpu_t *vcpu, const char *name, |
| 151 | + component_index_t component, |
| 152 | + uint64 source_val) |
| 153 | +{ |
| 154 | +#ifdef _M_IX86 |
| 155 | + asm_vmwrite(component, (uint32)source_val); |
| 156 | +#else |
| 157 | + asm_vmwrite(component, source_val); |
| 158 | +#endif |
| 159 | +} |
| 160 | + |
| 161 | +uint64 vmx_vmread(struct vcpu_t *vcpu, component_index_t component) |
| 162 | +{ |
| 163 | + uint64 val = 0; |
| 164 | + |
| 165 | + val = asm_vmread(component); |
| 166 | + return val; |
| 167 | +} |
| 168 | + |
| 169 | +uint64 vmx_vmread_natural(struct vcpu_t *vcpu, component_index_t component) |
| 170 | +{ |
| 171 | + uint64 val = 0; |
| 172 | + |
| 173 | + val = asm_vmread(component); |
| 174 | + return val; |
| 175 | +} |
| 176 | + |
| 177 | +uint64 vmx_vmread_64(struct vcpu_t *vcpu, component_index_t component) |
| 178 | +{ |
| 179 | + uint64 val = 0; |
| 180 | + |
| 181 | + val = asm_vmread(component); |
| 182 | +#ifdef _M_IX86 |
| 183 | + val |= ((uint64)(asm_vmread(component + 1)) << 32); |
| 184 | +#endif |
| 185 | + return val; |
| 186 | +} |
| 187 | + |
| 188 | +void hax_enable_irq(void) |
| 189 | +{ |
| 190 | + asm_enable_irq(); |
| 191 | +} |
| 192 | + |
| 193 | +void hax_disable_irq(void) |
| 194 | +{ |
| 195 | + asm_disable_irq(); |
| 196 | +} |
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