@@ -2096,41 +2096,43 @@ static int vcpu_emulate_insn(struct vcpu_t *vcpu)
20962096 em_context_t * em_ctxt = & vcpu -> emulate_ctxt ;
20972097 uint8_t instr [INSTR_MAX_LEN ] = {0 };
20982098 uint32_t exit_instr_length = vmcs_read (vcpu , VM_EXIT_INFO_INSTRUCTION_LENGTH );
2099- uint64_t cs_base = vcpu -> state -> _cs .base ;
21002099 uint64_t rip = vcpu -> state -> _rip ;
2100+ segment_desc_t cs ;
21012101 uint64_t va ;
21022102
21032103 // Clean up the emulation context of the previous MMIO instruction, so that
21042104 // even if things go wrong, the behavior will still be predictable.
21052105 vcpu_init_emulator (vcpu );
21062106
21072107 // Detect guest mode
2108+ cs .ar = vcpu_get_seg_ar (vcpu , SEG_CS );
21082109 if (!(vcpu -> state -> _cr0 & CR0_PE ))
21092110 mode = EM_MODE_REAL ;
2110- else if (vcpu -> state -> _cs .long_mode == 1 )
2111+ else if (cs .long_mode == 1 )
21112112 mode = EM_MODE_PROT64 ;
2112- else if (vcpu -> state -> _cs .operand_size == 1 )
2113+ else if (cs .operand_size == 1 )
21132114 mode = EM_MODE_PROT32 ;
21142115 else
21152116 mode = EM_MODE_PROT16 ;
21162117 em_ctxt -> mode = mode ;
21172118
21182119 // Fetch the instruction at guest CS:IP = CS.Base + IP, omitting segment
21192120 // limit and privilege checks
2120- va = (mode == EM_MODE_PROT64 ) ? rip : cs_base + rip ;
2121+ cs .base = vcpu_get_seg_base (vcpu , SEG_CS );
2122+ va = (mode == EM_MODE_PROT64 ) ? rip : cs .base + rip ;
21212123#ifdef CONFIG_HAX_EPT2
21222124 if (mmio_fetch_instruction (vcpu , va , instr , INSTR_MAX_LEN )) {
21232125 hax_panic_vcpu (vcpu , "%s: mmio_fetch_instruction() failed: vcpu_id=%u,"
21242126 " gva=0x%llx (CS:IP=0x%llx:0x%llx)\n" ,
2125- __func__ , vcpu -> vcpu_id , va , cs_base , rip );
2127+ __func__ , vcpu -> vcpu_id , va , cs . base , rip );
21262128 dump_vmcs (vcpu );
21272129 return -1 ;
21282130 }
21292131#else // !CONFIG_HAX_EPT2
21302132 if (!vcpu_read_guest_virtual (vcpu , va , & instr , INSTR_MAX_LEN , INSTR_MAX_LEN ,
21312133 0 )) {
21322134 hax_panic_vcpu (vcpu , "Error reading instruction at 0x%llx for decoding"
2133- " (CS:IP=0x%llx:0x%llx)\n" , va , cs_base , rip );
2135+ " (CS:IP=0x%llx:0x%llx)\n" , va , cs . base , rip );
21342136 dump_vmcs (vcpu );
21352137 return -1 ;
21362138 }
@@ -2142,7 +2144,7 @@ static int vcpu_emulate_insn(struct vcpu_t *vcpu)
21422144 hax_panic_vcpu (vcpu , "em_decode_insn() failed: vcpu_id=%u,"
21432145 " len=%u, CS:IP=0x%llx:0x%llx, instr[0..5]="
21442146 "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n" , vcpu -> vcpu_id ,
2145- exit_instr_length , cs_base , rip , instr [0 ], instr [1 ],
2147+ exit_instr_length , cs . base , rip , instr [0 ], instr [1 ],
21462148 instr [2 ], instr [3 ], instr [4 ], instr [5 ]);
21472149 dump_vmcs (vcpu );
21482150 return HAX_RESUME ;
@@ -2151,15 +2153,15 @@ static int vcpu_emulate_insn(struct vcpu_t *vcpu)
21512153 hax_debug ("Inferred instruction length %u does not match VM-exit"
21522154 " instruction length %u (CS:IP=0x%llx:0x%llx, instr[0..5]="
21532155 "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x)\n" , em_ctxt -> len ,
2154- exit_instr_length , cs_base , rip , instr [0 ], instr [1 ],
2156+ exit_instr_length , cs . base , rip , instr [0 ], instr [1 ],
21552157 instr [2 ], instr [3 ], instr [4 ], instr [5 ]);
21562158 }
21572159 rc = em_emulate_insn (em_ctxt );
21582160 if (rc < 0 ) {
21592161 hax_panic_vcpu (vcpu , "em_emulate_insn() failed: vcpu_id=%u,"
21602162 " len=%u, CS:IP=0x%llx:0x%llx, instr[0..5]="
21612163 "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n" , vcpu -> vcpu_id ,
2162- exit_instr_length , cs_base , rip , instr [0 ], instr [1 ],
2164+ exit_instr_length , cs . base , rip , instr [0 ], instr [1 ],
21632165 instr [2 ], instr [3 ], instr [4 ], instr [5 ]);
21642166 dump_vmcs (vcpu );
21652167 return HAX_RESUME ;
@@ -2206,22 +2208,7 @@ void vcpu_write_rflags(void *obj, uint64_t value)
22062208static uint64_t vcpu_get_segment_base (void * obj , uint32_t segment )
22072209{
22082210 struct vcpu_t * vcpu = obj ;
2209- switch (segment ) {
2210- case SEG_CS :
2211- return vcpu -> state -> _cs .base ;
2212- case SEG_DS :
2213- return vcpu -> state -> _ds .base ;
2214- case SEG_ES :
2215- return vcpu -> state -> _es .base ;
2216- case SEG_FS :
2217- return vcpu -> state -> _fs .base ;
2218- case SEG_GS :
2219- return vcpu -> state -> _gs .base ;
2220- case SEG_SS :
2221- return vcpu -> state -> _ss .base ;
2222- default :
2223- return vcpu -> state -> _ds .base ;
2224- }
2211+ return vcpu_get_seg_base (vcpu , segment );
22252212}
22262213
22272214static void vcpu_advance_rip (void * obj , uint64_t len )
@@ -3299,7 +3286,7 @@ static int handle_msr_read(struct vcpu_t *vcpu, uint32_t msr, uint64_t *val)
32993286 }
33003287 case IA32_FS_BASE : {
33013288 if (vcpu -> fs_base_dirty )
3302- * val = vcpu -> state -> _fs . base ;
3289+ * val = vcpu_get_seg_base ( vcpu , SEG_FS ) ;
33033290 else
33043291 * val = vmread (vcpu , GUEST_FS_BASE );
33053292 break ;
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