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Update README.md according to feedback
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hardware/priority_core_turbo/README.md

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## Overview
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**Intel® Priority Core Turbo (PCT)** is part of **Intel® Speed Select Technology – Turbo Frequency (SST-TF)**.
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**[Intel® Priority Core Turbo](https://www.intel.com/content/www/us/en/content-details/846906/priority-core-turbo-technology-pct-technology-technical-article.html) (PCT)** is part of **[Intel® Speed Select Technology](https://www.intel.com/content/www/us/en/content-details/682325/intel-speed-select-technology-intel-sst-performance-enhancements-for-3rd-gen-intel-xeon-scalable-processor-technology-guide.html)[Turbo Frequency](https://builders.intel.com/solutionslibrary/intel-speed-select-technology-turbo-frequency-intel-sst-tf-overview-user-guide) (SST-TF)**.
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It allows a subset of CPU cores to operate at **higher turbo frequencies**, while remaining cores run closer to base frequency.
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This is particularly effective for **GPU-accelerated AI inference**, where a small number of CPU threads handle
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**latency-critical, mostly serial tasks** such as tokenization, scheduling, and feeding GPUs.
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Running these threads on **High-Priority (HP) cores** improves GPU utilization, TTFT, and tail latency.
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Running these threads on **High-Priority (HP) cores** improves GPU utilization, Time-to-first-token (TTFT), and tail latency.
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Validated platforms:
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### PCT bucket-count interpretation
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intel-speed-select tool mentioned below is installed inside the docker image in the [environment build seciton](#1-build-the-environment)
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`intel-speed-select turbo-freq info -l <level>` may print the same `bucket-0`,
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`bucket-1`, and `bucket-2` SST-TF table under multiple `powerdomain-*` anchors.
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`bucket-1`, and `bucket-2` SST-TF table under multiple `powerdomain-*` anchors.
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A powerdomain anchor is the representative CPU id where a packages's internal power domain starts.
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For PCT **capacity**, this flow counts `bucket-0` **once per package/socket**:
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| **PCT capacity** | Count `bucket-0` once per package/socket |
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| **HP CPU placement** | Dispatch the package-level PCT core budget across the package's PCT reporting powerdomain anchors |
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For Intel® Xeon® 6776P system, `bucket-0` reports:
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For Intel® Xeon® 6776P system with 2 sockets and 64 cores per socket, `bucket-0` reports using check_pct_status.sh in [check-pct-status session](#2-check-pct-status):
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```text
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PCT_CORES_PER_PACKAGE=8
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0-3,32-35,64-67,96-99,128-131,160-163,192-195,224-227
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```
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This is the default strict bucket-0 PCT placement used by the updated set script.
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</details>
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## 1. Build the Environment
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</details>
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## 2. Check PCT Status (Read-Only)
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## 2. Check PCT Status
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<details>
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<summary> This step verifies: </summary>
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For the example above, `clos0_cpulist.txt` contains 32 logical CPUs. With
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Hyper-Threading enabled, that corresponds to 16 physical PCT cores.
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## 3. Set PCT (Dispatch Package-Level PCT Cores Across Powerdomain Anchors)
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## 3. Set PCT and Assigned HP CPUs
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This step **activates PCT in practice** by assigning selected HP CPUs to **CLOS0**.
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✅ CLOS0 CPU count exactly matches the bucket-0 PCT logical budget.
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```
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## 4. Benchmark CLOS0 CPUs with Host PerfSpect
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## 4. Benchmark CLOS0 CPUs with PerfSpect tool on the host
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Use Docker only to configure and verify PCT/CLOS. Run PerfSpect on the host so
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the frequency benchmark can access host CPU frequency interfaces directly.
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</details>
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### Run the benchmark
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Run the full flow:
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By using PerfSpect benchmark feature, it generates a diagram of CPU frequency among different number of active CPU cores.
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The diagram helps us to understand whether PCT cores can reach the right CPU frequency.
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Run the full flow with [run_host_perfspect_benchmark.sh](run_host_perfspect_benchmark.sh) :
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```bash
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docker compose --progress=plain --profile set up --abort-on-container-exit

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