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Added memory regions for stm in linkerscript
1 parent 3cb94d3 commit 69f7fea

3 files changed

Lines changed: 50 additions & 7 deletions

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targets/chip/stm32f407/linkerscript.ld

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -112,6 +112,21 @@ SECTIONS
112112
PROVIDE(__heap_end = (ORIGIN(ram) + LENGTH(ram)));
113113
} > ram
114114

115+
/* additional ram segment */
116+
DATA_SECTION(ram1, ram1, rom)
117+
BSS_SECTION(ram1, ram1)
118+
119+
/* create a table to initialize the data sections on a secondary memory */
120+
DATA_MULTISECTION_TABLE(
121+
DATA_SECTION_ENTRY(ram1)
122+
DATA_SECTION_ENTRY_END()
123+
) > rom
124+
125+
/* create a table to initialize the bss sections on a secondary memory */
126+
BSS_MULTISECTION_TABLE(
127+
BSS_SECTION_ENTRY(ram1)
128+
) > rom
129+
115130
/* Remove information from the standard libraries */
116131
/DISCARD/ :
117132
{

targets/chip/stm32f469/linkerscript.ld

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,8 @@ MEMORY
1919
{
2020
rom (rx) : org = 0x00000000, len = 2m
2121
ccm (rwx) : org = 0x10000000, len = 64k
22-
/* ram0, ram1 and ram2 in one continuous block */
23-
ram0 (rwx) : org = 0x20000000, len = 320k
22+
/* ram, ram1 and ram2 in one continuous block */
23+
ram (rwx) : org = 0x20000000, len = 320k
2424
/* ram1 (rwx) : org = 0x20028000, len = 32k */
2525
/* ram2 (rwx) : org = 0x20030000, len = 128k */
2626

@@ -79,7 +79,7 @@ SECTIONS
7979
CONSTRUCTOR_SECTION(fini_array) > rom
8080

8181
/* Stack segment */
82-
STACK(STACK_SIZE) > ram0
82+
STACK(STACK_SIZE) > ram
8383

8484
/* Data that needs to be initialized to a value different than 0 */
8585
.data :
@@ -96,7 +96,7 @@ SECTIONS
9696

9797
PROVIDE(__data_end = .);
9898
PROVIDE(__data_init_end = LOADADDR(.data));
99-
} > ram0 AT > rom
99+
} > ram AT > rom
100100

101101
/* Data that needs to be initialized to 0 */
102102
.bss (NOLOAD) :
@@ -111,7 +111,7 @@ SECTIONS
111111
. = ALIGN(4);
112112

113113
PROVIDE(__bss_end = .);
114-
} > ram0
114+
} > ram
115115

116116
/* ccm memory */
117117
DATA_SECTION(ccm, ccm, rom)
@@ -152,8 +152,8 @@ SECTIONS
152152
{
153153
. = ALIGN(4);
154154
PROVIDE(__heap_start = .);
155-
PROVIDE(__heap_end = (ORIGIN(ram0) + LENGTH(ram0)));
156-
} > ram0
155+
PROVIDE(__heap_end = (ORIGIN(ram) + LENGTH(ram)));
156+
} > ram
157157

158158
/* Remove information from the standard libraries */
159159
/DISCARD/ :

targets/chip/stm32h723/linkerscript.ld

Lines changed: 28 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -113,6 +113,34 @@ SECTIONS
113113
PROVIDE(__heap_end = (ORIGIN(ram) + LENGTH(ram)));
114114
} > ram
115115

116+
/* additional ram segment */
117+
DATA_SECTION(ram1, ram1, rom)
118+
DATA_SECTION(ram2, ram2, rom)
119+
DATA_SECTION(itcram, itcram, rom)
120+
DATA_SECTION(dtcram, dtcram, rom)
121+
BSS_SECTION(ram1, ram1)
122+
BSS_SECTION(ram2, ram2)
123+
BSS_SECTION(itcram, itcram)
124+
BSS_SECTION(dtcram, dtcram)
125+
126+
/* create a table to initialize the data sections on a secondary memory */
127+
DATA_MULTISECTION_TABLE(
128+
DATA_SECTION_ENTRY(ram1)
129+
DATA_SECTION_ENTRY(ram2)
130+
DATA_SECTION_ENTRY(itcram)
131+
DATA_SECTION_ENTRY(dtcram)
132+
DATA_SECTION_ENTRY_END()
133+
) > rom
134+
135+
/* create a table to initialize the bss sections on a secondary memory */
136+
BSS_MULTISECTION_TABLE(
137+
BSS_SECTION_ENTRY(ram1)
138+
BSS_SECTION_ENTRY(ram2)
139+
BSS_SECTION_ENTRY(itcram)
140+
BSS_SECTION_ENTRY(dtcram)
141+
BSS_SECTION_ENTRY_END()
142+
) > rom
143+
116144
/* Remove information from the standard libraries */
117145
/DISCARD/ :
118146
{

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