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Commit 749ee2f

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author
Bram Speeckaert
committed
Jit64: Refactor divwux
Now that we've moved the logic to DivUtils, refactor the Jit64 code to use it.
1 parent 825a106 commit 749ee2f

1 file changed

Lines changed: 12 additions & 25 deletions

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Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp

Lines changed: 12 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1451,12 +1451,10 @@ void Jit64::divwux(UGeckoInstruction inst)
14511451
}
14521452
else
14531453
{
1454-
u32 shift = 31;
1455-
while (!(divisor & (1 << shift)))
1456-
shift--;
1457-
1458-
if (divisor == (u32)(1 << shift))
1454+
if (MathUtil::IsPow2(divisor))
14591455
{
1456+
u32 shift = MathUtil::IntLog2(divisor);
1457+
14601458
RCOpArg Ra = gpr.Use(a, RCMode::Read);
14611459
RCX64Reg Rd = gpr.Bind(d, RCMode::Write);
14621460
RegCache::Realize(Ra, Rd);
@@ -1468,24 +1466,22 @@ void Jit64::divwux(UGeckoInstruction inst)
14681466
}
14691467
else
14701468
{
1471-
u64 magic_dividend = 0x100000000ULL << shift;
1472-
u32 magic = (u32)(magic_dividend / divisor);
1473-
u32 max_quotient = magic >> shift;
1469+
UnsignedMagic m = UnsignedDivisionConstants(divisor);
14741470

14751471
// Test for failure in round-up method
1476-
if (((u64)(magic + 1) * (max_quotient * divisor - 1)) >> (shift + 32) != max_quotient - 1)
1472+
if (!m.fast)
14771473
{
14781474
// If failed, use slower round-down method
14791475
RCOpArg Ra = gpr.Use(a, RCMode::Read);
14801476
RCX64Reg Rd = gpr.Bind(d, RCMode::Write);
14811477
RegCache::Realize(Ra, Rd);
14821478

1483-
MOV(32, R(RSCRATCH), Imm32(magic));
1479+
MOV(32, R(RSCRATCH), Imm32(m.multiplier));
14841480
if (d != a)
14851481
MOV(32, Rd, Ra);
14861482
IMUL(64, Rd, R(RSCRATCH));
14871483
ADD(64, Rd, R(RSCRATCH));
1488-
SHR(64, Rd, Imm8(shift + 32));
1484+
SHR(64, Rd, Imm8(m.shift + 32));
14891485
}
14901486
else
14911487
{
@@ -1494,32 +1490,23 @@ void Jit64::divwux(UGeckoInstruction inst)
14941490
RCX64Reg Rd = gpr.Bind(d, RCMode::Write);
14951491
RegCache::Realize(Ra, Rd);
14961492

1497-
magic++;
1498-
1499-
// Use smallest magic number and shift amount possible
1500-
while ((magic & 1) == 0 && shift > 0)
1501-
{
1502-
magic >>= 1;
1503-
shift--;
1504-
}
1505-
15061493
// Three-operand IMUL sign extends the immediate to 64 bits, so we may only
15071494
// use it when the magic number has its most significant bit set to 0
1508-
if ((magic & 0x80000000) == 0)
1495+
if ((m.multiplier & 0x80000000) == 0)
15091496
{
1510-
IMUL(64, Rd, Ra, Imm32(magic));
1497+
IMUL(64, Rd, Ra, Imm32(m.multiplier));
15111498
}
15121499
else if (d == a)
15131500
{
1514-
MOV(32, R(RSCRATCH), Imm32(magic));
1501+
MOV(32, R(RSCRATCH), Imm32(m.multiplier));
15151502
IMUL(64, Rd, R(RSCRATCH));
15161503
}
15171504
else
15181505
{
1519-
MOV(32, Rd, Imm32(magic));
1506+
MOV(32, Rd, Imm32(m.multiplier));
15201507
IMUL(64, Rd, Ra);
15211508
}
1522-
SHR(64, Rd, Imm8(shift + 32));
1509+
SHR(64, Rd, Imm8(m.shift + 32));
15231510
}
15241511
}
15251512
if (inst.OE)

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